An amplification device including: a switch including an output that is suitable for being connected to a first or a second input; a first branch that is connected to the first input, which applies a first gain to generate a first amplified signal; a second branch that is connected to the second input, which applies a second gain to generate a second amplified signal; a controller for controlling the switching of the switch to apply the first or the second amplified signal to the output, depending on whether or not the value of a predetermined quantity of the first amplified signal falls within a predetermined range. The first gain and the second gain being non-zero real numbers of opposite sign.

A multi-stage amplifier with a high signal-to-noise ratio is introduced. Multiple amplification stages are cascaded between an input terminal and an output terminal of the amplifier. A controller switches the output stage among the multiple amplification stages from a normal mode to an attenuation mode in response to the amplifier input being lower than the threshold. In the attenuation mode, the output stage provides an attenuation resistor coupled in series with the load resistor of the amplifier. Noise is successfully attenuated by the attenuation-mode output stage.

Aspects and examples described herein provide a variable gain amplifier circuit and assembly. In one example, a variable gain amplifier circuit includes a signal input, a signal output, and a variable gain amplifier including a plurality of unit cell groups coupled between the signal input and the signal output, the variable gain amplifier configured to provide an adjustable gain to a signal received at the signal input during each of a plurality of amplify modes of the variable gain amplifier, each of the plurality of amplify modes corresponding to at least one unit cell group of the plurality of unit cell groups. A bypass path including a fixed attenuator is coupled in parallel with the variable gain amplifier between the signal input and the signal output to selectively couple the signal input to the signal output through the fixed attenuator during a bypass mode.

The present disclosure relates to a switchable power amplification structure including a first power amplifier (PA), a second PA, a front switching structure, and an end switching structure. The front switching structure is coupled to a radio frequency (RF) input port, and the end switching structure is coupled to an antenna port. Herein, the first PA and the second PA are parallel to each other, each of which is coupled between the front switching structure and the first end switching structure. The front switching structure is configured to selectively couple the first PA and the second PA to the RF input port, while the end switching structure is configured to selectively couple the first PA and the second PA to the first antenna port.

A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. A output passive network can further generate a flat-phase response between dual resonances of operation.

A transmitter device which transmits a first transmit signal and a second transmit signal having different wireless communication standards. The transmitter device includes a power amplifier that amplifies the first transmit signal in a first transmission mode. A first impedance circuit provides the amplified first transmit signal to a radio frequency output port. A second impedance circuit is connected to the first impedance circuit and provides an additional impedance to the first impedance circuit in the first transmission mode. A first switch provides the second transmit signal to the first impedance circuit in a second transmission mode. A second switch connects the second impedance circuit and a ground in the first transmission mode, and floats the second impedance circuit in the second transmission mode

An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.

In electronic circuits having various gain states, small gain phase shift differences required among various gain states may pose a challenging problem. The disclosed methods and devices provide solution to such challenge. Electronic circuits are described wherein a first path including an amplifier may be bypassed by a second path including only passive elements and for gain states smaller than 0 dB. In such electronic circuits, a phase shifter included in the second path can be adjusted to address the required phase shift among various gain states.

Radio frequency amplifiers with overload protection are provided herein. In certain configurations, an RF amplifier system includes an RF amplifier that receives an RF signal from an input terminal and that generates an amplified RF signal at an output terminal, and an overload detection circuit that generates a detection signal indicating a detected signal level of the RF amplifier. The RF amplifier includes an amplification device that amplifies the RF signal and a degeneration circuit that provides degeneration to the amplification device. Additionally, the detection signal is operable to control an amount of degeneration provided by the degeneration circuit so as to protect the RF amplifier from overload.

Disclosed are methods for biasing amplifiers and for manufacturing bias circuits bias for biasing amplifiers. A power amplifier bias circuit can include an emitter follower device and an emitter follower mirror device coupled to form a mirror configuration. The emitter follower device can be configured to provide a bias signal for a power amplifier at an output port. The power amplifier bias circuit can include a reference device configured to mirror an amplifying transistor of an amplifying device of the power amplifier. The emitter follower mirror device can be configured to provide a mirror bias signal to the reference device. A node between the emitter follower device and the emitter follower mirror device can have a voltage of approximately twice a base-emitter voltage (2Vbe) of the amplifying transistor.