Circuits and methods for using in parallel amplification and signal combining are described herein. A circuit uses a digitally controlled multistage cascade combiner, a digital phase and drive signal amplifier controller and a digital combiner controller circuit with N parallel signals with constant amplitudes belonging to an alphabet with M discrete values and discrete phases feeding it. The signals resulting from N power amplifiers (PAs) have also constant amplitudes belonging to an alphabet with N discrete values and discrete phases prior to being fed to the multistage combiner. A digital combiner controller circuit generates digital control information to activate, or deactivate, the outputs of the PAs, where a set of digital control signals generated in digital combiner controller are used to control sets of switches, where the signals can be activated at the combiner's inputs, according to their power and phase values. The digital control information ensures that only in-phase signals are combined in the active combiner stage and any difference among the inputs of the combiners is always minimized. Both digital combiner controller and digital drive signal amplifier controller, share information about the signals not to be fed to the multistage combiner, so that PAs drive signals can also be powered off under these circumstances. In provide high efficiency amplification the signal amplifiers employed before the combining stage may be of switched or current source type.

Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.

A differential amplifier is provided. The differential amplifier includes a first load, a second load, a current source, a differential pair circuit, a first and a second switch circuit. The differential pair circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first switch circuit controls the first and the second transistors, and the second switch circuit controls the third and the fourth transistors. Through the control and selection of the first and second switch circuits, a differential pair is selected in the differential pair circuit to receive and process a first input signal and a second input signal for signal.

Disclosed herein are signal amplifiers that include a plurality of switchable amplifier architectures so that particular gain modes can use dedicated amplifier architectures to provide desired characteristics for those gain modes, such as low noise figure or high linearity. The disclosed signal amplifier architectures provide tailored impedances using a degeneration block or matrix without using switches in the degeneration switching block. The disclosed signal amplifier architectures provide a plurality of gain modes where different gain modes use different paths through the amplifier architecture. Switches that are used to select the path through the amplifier architecture also provide targeted impedances in a degeneration block or matrix. The switches that select the gain path are provided in the amplifier architecture and are thus not needed or used in the degeneration block, thereby reducing the size of the package for the amplifier architecture.

Various technologies described herein pertain to variable gain amplification for a sensor application. A multistage variable gain amplifier system provides variable gain amplification of an input signal. The multistage variable gain amplifier system includes a plurality of amplification stages. The multistage variable gain amplifier system further includes a power detector configured to detect a power level of an input signal received by the multistage variable gain amplifier system. The multistage variable gain amplifier system also includes a controller configured to control the amplification stages based on the power level of the input signal. The multistage variable gain amplifier system can output an output signal such that the amplification stages are controlled to adjust a gain applied to the input signal by the multistage variable gain amplifier system to output the output signal.

A multi-stage amplifier with a high signal-to-noise ratio is introduced. Multiple amplification stages are cascaded between an input terminal and an output terminal of the amplifier. A controller switches the output stage among the multiple amplification stages from a normal mode to an attenuation mode in response to the amplifier input being lower than the threshold. In the attenuation mode, the output stage provides an attenuation resistor coupled in series with the load resistor of the amplifier. Noise is successfully attenuated by the attenuation-mode output stage.

An amplifier circuit has an amplification path including an amplifier and a bypass path configured to bypass at least the amplifier. The bypass path includes a switch coupled in series on the bypass path and another switch coupled in series between the bypass path and ground. The amplification path further includes an inductor coupled on an output side with respect to the amplifier and a switch coupled between the inductor and ground on a path between the inductor and the amplifier.

Various technologies described herein pertain to variable gain amplification for a sensor application. A multistage variable gain amplifier system provides variable gain amplification of an input signal. The multistage variable gain amplifier system includes a plurality of amplification stages. The multistage variable gain amplifier system further includes a power detector configured to detect a power level of an input signal received by the multistage variable gain amplifier system. The multistage variable gain amplifier system also includes a controller configured to control the amplification stages based on the power level of the input signal. The multistage variable gain amplifier system can output an output signal such that the amplification stages are controlled to adjust a gain applied to the input signal by the multistage variable gain amplifier system to output the output signal.

Radio frequency (RF) amplifiers with overload protection are provided herein. In certain configurations, an RF amplifier system includes an RF amplifier that receives an RF signal from an input terminal. The RF amplifier includes an amplification field-effect transistor (FET) having a gate that receives the RF signal, and a degeneration circuit connected between a source of the amplifier FET and a ground voltage. The RF amplifier system further includes an electrostatic discharge protection circuit including a plurality of protection diodes electrically connected in series between the input terminal and the ground voltage, and a detector having an input connected along an electrical path through the plurality of protection diodes and an output that generates a detection signal operable to control an amount of degeneration provided by the degeneration circuit.

Various technologies described herein pertain to variable gain amplification for a sensor application. A multistage variable gain amplifier system provides variable gain amplification of an input signal. The multistage variable gain amplifier system includes a plurality of amplification stages. The multistage variable gain amplifier system further includes a power detector configured to detect a power level of an input signal received by the multistage variable gain amplifier system. The multistage variable gain amplifier system also includes a controller configured to control the amplification stages based on the power level of the input signal. The multistage variable gain amplifier system can output an output signal such that the amplification stages are controlled to adjust a gain applied to the input signal by the multistage variable gain amplifier system to output the output signal.