A semiconductor integrated circuit includes an equalizer circuit configured to amplify a signal component in a particular frequency band of an input signal on a signal path after a coupling capacitor, a sampler circuit configured to convert a first signal outputted from the equalizer circuit to a digital signal, a detector circuit configured to output a second signal based on a frequency of appearance of two values included in the digital signal, and a compensator circuit configured to compensate for a shift of a DC voltage level on the signal path after the coupling capacitor based on the second signal outputted from the detector circuit.

Examples disclosed herein relate to a dynamic supply modulation power amplifier architecture for millimeter wave applications. The architecture includes phase shifters coupled to a power input port, power amplifiers coupled to respective power output ports, variable gain amplifiers coupled to the phase shifters and to the power amplifiers and are configured to supply dynamically varying input power to the power amplifiers. The architecture includes a first look-up table coupled to the variable gain amplifiers to control the variable gain amplifiers. The architecture also includes a second look-up table coupled to the power amplifiers, where each of the power amplifiers is supply modulated by active drain voltage modulation controlled by the second look-up table and variable input power from the variable gain amplifiers. Other examples disclosed herein include a radar system for use in an autonomous driving vehicle and an analog beamforming antenna for millimeter wave applications.

A lookup table calibration apparatus and method are disclosed. The lookup table calibration apparatus includes a power amplifier circuit configured to amplify a radio frequency (RF) signal having time-variant power levels based on a modulated voltage. To ensure proper alignment between the modulated voltage and the time-variant power levels, the power amplifier circuit is further configured to phase-shift the RF signal based on a modulated phase correction voltage. Specifically, the modulated voltage is generated based on a modulated voltage lookup table and the modulated phase correction voltage is generated based on a phase correction voltage lookup table. Herein, the lookup table calibration apparatus can be configured to concurrently populate and/or calibrate the modulated voltage lookup table and the phase correction voltage lookup table based on a measured gain and a measured phase of the RF signal, respectively.

Radio frequency (RF) generators are disclosed. A RF generator may include an analog signal generator configured to generate a pulsed analog signal responsive to a digital pulsed waveform defined by one or more commands. The RF generator may also include a modulator configured to generate a pulsed radio frequency (RF) signal by modulating an RF carrier using the pulsed analog signal as a modulating signal. Further, the RF generator may include an amplification stage configured to amplify the pulsed RF signal output by the modulator. RF generation systems and methods of generating a pulsed RF signal also disclosed.

A radio frequency amplifying device according to an embodiment includes load impedance calculating circuitry and controlling circuitry. The load impedance calculating circuitry is configured to calculate a load impedance on the basis of information about a voltage standing wave rate and a phase on an output side of radio frequency amplifying circuitry. The controlling circuitry is configured to adjust a gain and a phase of a signal to be input to the radio frequency amplifying circuitry, in accordance with the load impedance calculated by the load impedance calculating circuitry.

Disclosed herein is a voltage gain amplifier for use in an automotive radar receiver chain. The voltage gain amplifier utilizes pole-zero cancelation to yield a desired transfer function without gain peaking at a bandwidth in which attenuation is desired, and utilizes a low pass filter effectively formed by a feedback loop including a high pass filter and a differential amplifier to ensure the desired level of attenuation at the desired bandwidth. In some instances, a chopper may be utilized in the feedback loop prior to the high pass filter, and after the differential amplifier, so as to reduce the bandwidth of the differential amplifier in the feedback loop.

In one embodiment, an apparatus includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to a second frequency signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the second frequency signal, the PGA having a second controllable gain; a digitizer to digitize the second frequency signal to a digitized signal; a demodulator coupled to the digitizer to demodulate the digitized signal; an automatic gain control (AGC) circuit to control one or more of the first controllable gain and the second controllable gain; and an AGC settling circuit to cause the demodulator to begin operation in response to determining that the AGC circuit has settled.

Radio frequency (RF) front ends with integrated channel matching calibration are provided herein. In one aspect, a front end system includes: a plurality of front end amplification chains including transmit and receive chains for at least two radio frequency bands, each of the front end amplification chains configured to either transmit or receive radio frequency signals via one of a plurality of antennas, and each of the front end amplification chains includes an amplifier configured to receive a bias current and amplify the corresponding radio frequency signal based on the bias current, a control circuit configured to generate each of the bias currents, and a multiplexor configured to receive the bias currents and provide the bias currents to the corresponding amplifiers.

A system for power amplifier control includes a processor, a memory in communication with the processor, wherein the processor and the memory are configured to simultaneously provide input signal strength of each of a plurality of power amplifiers in a millimeter wave (mmW) phased array system, determine an average input signal strength of the plurality of power amplifiers based on the provided input signal strengths using an analog-to-digital converter (ADC), determine a voltage headroom for the plurality of power amplifiers based on the determined average input signal strength, estimate a power backoff value based on the voltage headroom, and determine a gain control value based on the estimated power backoff value.

In some implementations, a radiofrequency down converter comprises an input port to receive a radiofrequency input signal, and the down converter includes a first bandpass filter configured to filter the input signal. The down converter includes a mixer stage coupled to the bandpass filter, the mixer stage being configured to generate a mixer output signal by processing the filtered input signal using a gain adjustment device, one or more amplifiers, and a mixer. The down converter includes a signal adjustment stage coupled to receive the mixer output signal, the signal adjustment stage comprising: a temperature compensation device configured to compensate for changes in signal gain due to changes in temperature; a second bandpass filter; a gain adjustment device; one or more amplifiers; and a low pass filter. The down converter comprises an output port coupled to output an adjusted mixer output signal from the signal adjustment stage.