Patent classifications
H03G2201/307
Power amplifier (PA)-filter output power tuning
A technology is described for a repeater. A repeater can comprise a first port; a second port; a first-direction amplification and filtering path coupled between the first port and the second port; a multiplexer coupled between: the first-direction amplification and filtering path; and the second port; and a power amplifier (PA) coupled between the first port and the multiplexer. The repeater can further comprise an adjustable matching network coupled between the PA and the multiplexer, wherein the adjustable matching network is actively adjusted to match an impedance of an output of the PA at a selected channel over a frequency range for a first-direction signal with an impedance of an input of the multiplexer over the selected channel over the frequency range for a first-direction signal.
Amplifier Circuit
An amplifier circuit includes an input terminal used to receive an input signal, an output terminal used to output an output signal, an amplification unit, and a phase adjustment unit. The amplification unit includes an input terminal coupled to the input terminal of the amplifier circuit, an output terminal coupled to the output terminal of the amplifier circuit, a first terminal coupled to a first voltage terminal, and a second terminal coupled to a second voltage terminal. The phase adjustment unit is coupled to the amplification unit. When the amplifier circuit is operated in a first mode, the output signal has a first phase, and when the amplifier circuit is operated in a second mode, the output signal has a second phase. A difference between the first phase and the second phase is within a predetermined range.
Method and Apparatus to Optimize Power Clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
Receiver circuits with blocker attenuating mixer
A receiver circuit is disclosed. The receiver circuit includes an amplifier having an input terminal, where the amplifier is configured to generate an RF signal based on a signal received at the input terminal, where the RF signal includes an information signal and a blocker signal modulating an RF carrier frequency. The receiver circuit also includes a mixer configured to receive the RF signal and to downconvert the RF signal to generate a baseband signal, where the baseband signal includes the information signal and the blocker signal modulating a baseband carrier frequency, where the baseband carrier frequency is less than the RF carrier frequency, and where the mixer is further configured to selectively attenuate the blocker signal.
ULTRA-SMALL MILLIMETER WAVE 5G BEAM FORMER ARCHITECTURE
A radio frequency integrated circuit connectible to an array of antenna elements has an RF input/output port and antenna ports that are each connected to respective antenna elements of the array. A transmit-receive amplifier circuit with an amplifier input and an amplifier output is activated during both a transmit mode and a receive mode. An RF switch selectively connects the amplifier input to the RF input/output port and the amplifier output to one of the antenna ports in a transmit mode, and the amplifier input to the one of the antenna ports and the amplifier output to the RF input/output port in a receive mode.
Circuit and a method for generating a radio frequency signal
A circuit for generating a radio frequency signal is provided. The circuit includes an amplifier configured to generate a radio frequency signal based on a baseband signal. Further, the circuit includes a power supply configured to generate a variable supply voltage based on a control signal indicating a desired supply voltage, and to supply the variable supply voltage to the amplifier. The circuit further includes an envelope tracking circuit configured to generate the control signal based on a bandwidth of the baseband signal, and to supply the control signal to the power supply.
Booster gain adjustment based on user equipment (UE) need
A technology is described for adjusting repeater gain based on user equipment need. A downlink path of the repeater can be deactivated. A deactivated throughput value can be received from the UE for data received at the UE in a selected time period. The downlink amplification path of the repeater can be activated. An activated throughput value for data received at the UE in the selected time period can be received from the UE. A difference can be determined between the deactivated throughput value and the activated throughput value. A repeater gain value can be reduced or bypassed when the deactivated throughput value is greater than the activated throughput value by a selected threshold value.
Adaptive degeneration circuits
This disclosure relates to variable-gain amplifiers that include degeneration circuits configured to adapt to a gain mode that is currently being implemented. For example, a variable-gain amplifier can operate in a plurality of gain modes to amplify a signal with different levels of amplification. The variable-gain amplifier can include a gain circuit configured to amplify a signal and a degeneration circuit coupled to the gain circuit. The degeneration circuit can include an inductor and a switching-capacitive arm coupled in parallel to the inductor. The degeneration circuit can operate based on a current gain mode to change an inductance for the variable-gain amplifier.
BIDIRECTIONAL RF CIRCUIT AND METHOD OF USE
A bidirectional RF circuit, preferably including a plurality of terminals, a switch, a transistor, a coupler, and a feedback network. The circuit can optionally include a drain matching network, an input matching network, and/or one or more tuning inputs. In some variations, the circuit can optionally include one or more impedance networks, such as an impedance network used in place of the feedback network; in some such variations, the circuit may not include a coupler, switch, and/or input matching network. A method for circuit operation, preferably including operating in an amplifier mode, operating in a rectifier mode, and/or transitioning between operation modes.
Sign switching circuitry
A sign switching circuitry is disclosed. In one aspect, the sign switching circuitry includes a first and second differential common-source amplifier having common differential input nodes and common differential output nodes configured such that a differential input signal applied at the common differential input nodes is amplified to a differential output signal at the common differential output nodes with a fixed gain by the first amplifier and by the fixed gain with opposite sign by the second amplifier. The sign switching circuitry also includes a switching circuitry configured to activate the first common-source amplifier and deactivate the second common-source amplifier to amplify the differential input signal by the fixed gain, and to activate the second common-source amplifier and deactivate the first common-source amplifier to amplify the differential input signal by the fixed gain with opposite sign.