Patent classifications
H03H2001/0078
Flexible resonant trap circuit
A flexible resonant trap circuit is provided that includes a transmission line arranged to include a helical winding that has a first helical winding segment and a second helical winding segment; and a capacitor coupled between the first and second helical winding segments.
RESONANT INDUCTIVE-CAPACITIVE ISOLATED DATA CHANNEL
An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first or second metal layers and coupled to one of the first or second plates in a resonant circuit.
Radio frequency filtering circuitry on integrated passive die
An integrated passive die includes a substrate, an input node, an output node, and RF filtering circuitry. The RF filtering circuitry includes a number of LC tank circuits coupled between the input node and the output node. Each one of the LC tank circuits include an inductor and a capacitor. The inductor is formed by a metal trace over the substrate. The capacitor is coupled in parallel with the inductor over the substrate. The inductor and the capacitor are provided such that a resonance frequency of the combination of the inductor and the capacitor is less than a self-resonance frequency of the inductor.
SEMICONDUCTOR DEVICE
An amplifier is formed in a wiring layer. A semiconductor device includes a second layer over a first layer with a metal oxide therebetween. The first layer includes a first transistor including a first semiconductor layer containing silicon. The second layer includes an impedance matching circuit, and the impedance matching circuit includes a second transistor including a second semiconductor layer containing gallium. The first transistor forms first coupling capacitance between the first transistor and the metal oxide, and the impedance matching circuit forms second coupling capacitance between the impedance matching circuit and the metal oxide. The impedance matching circuit is electrically connected to the metal oxide through the second coupling capacitance. The metal oxide inhibits the influence of first radiation noise emitted from the impedance matching circuit on the operation of the first transistor.
BAND STOP FILTER STRUCTURE AND METHOD OF FORMING
A filter structure includes a ground plane in a first metal layer of an integrated circuit (IC) package, a plate in a second metal layer of the IC package, a dielectric layer between the ground plane and the plate, the ground plane, the dielectric layer, and the plate thereby being configured as a capacitive device, and an inductive device in a third metal layer of the IC package. The inductive device is electrically connected to the plate, and the plate and the inductive device are configured to have a resonance frequency greater than 1 GHz.
PLANAR MULTI-LAYER RADIO FREQUENCY FILTERS INCLUDING STACKED COILS WITH STRUCTURAL CAPACITANCE
A radio frequency filter is provided and includes a dielectric layer and a first inductor. The first inductor includes an input, a first coil disposed on a first side of the dielectric layer and connected to the input, and a second coil disposed on a second side of the dielectric layer opposite the first side. The first and second coils are planar, such that windings of the first coil are in a first layer and windings of the second coil are in a second layer. The first coil overlaps and is connected in series with the second coil. The first coil, the dielectric layer and the second coil collectively provide a capacitance of the radio frequency filter. The first inductor further includes a first via extending through the dielectric layer and connected to the first coil and the second coil and a first output connected to the second coil.
Method, system and device providing enhanced quality factor resonant LC tank in an integrated circuits
According to an aspect, a tank circuit in an integrated circuit comprising a plurality of metal strips forming a first part of a closed contour enclosing a first area, a set of split sections forming a second part and geometrically aligned with the closed contour, and a plurality of capacitors coupled between the split sections to form the tank circuit, wherein a first flux linkage due a current flowing in the set of split sections pass through the first area in the same direction as that of a second flux linkage due to the current flowing in the plurality of metal strips, and the set of split sections and the plurality of metal strips together forming an inductance coil.
Band stop filter structure and method of forming
A filter structure includes a ground plane in a first metal layer of an integrated circuit (IC) package, a plate in a second metal layer of the IC package, a dielectric layer between the ground plane and the plate, the ground plane, the dielectric layer, and the plate thereby being configured as a capacitive device, and an inductive device in a third metal layer of the IC package. The inductive device is electrically connected to the plate, and the plate and the inductive device are configured to have a resonance frequency greater than 1 GHz.
QUADRATURE HYBRID WITH VARIABLE CAPACITOR TUNING NETWORK
Embodiments of a method and an apparatus for a quadrature hybrid are disclosed. In an embodiment, a quadrature hybrid includes a first port, a second port, a third port, a fourth port, first, second, and third inductors, first, second, third, and fourth capacitors, and a first variable capacitor tuning network connected between the first port and the fourth port, and a second variable capacitor tuning network connected between the second port and the third port.
Systems and methods for an inductor structure having an unconventional turn-ratio in integrated circuits
Embodiments described herein provide circuitry employing one or more inductors having an unconventional turn-ratio. The circuitry includes a primary inductor having a first length located on a first layer of an integrated circuit (IC). The circuitry further includes a secondary inductor having a second length located on a second layer of the IC different from the first layer, whereby the second length is greater than the first length, with a ratio between the first and the second lengths corresponding to a non-integer turn-ratio.