A radio frequency filtering circuitry includes a first inductor, a second inductor, and a conductive loop. The first inductor receives a first current that induces a second current in the second inductor upon receiving the first current. The first inductor and/or the second inductor induce a third current in the conductive loop. The conductive loop adjusts the third current to reduce a first gain peak of an output signal to correlate to a second gain peak of the output signal.

The disclosure relates to an ultra-wide passband five-order band-pass filter based on an LTCC process. The ultra-wide passband five-order band-pass filter comprises a ceramic substrate, a bottom input electrode, a bottom output electrode and a bottom grounding electrode. Five parallel resonators, a grounding polar plate, two series connection capacitors, two series connection inductors, a cross-coupling capacitor and a parallel inductor are arranged in the ceramic substrate; the two series connection capacitors comprise a first series capacitor and a second series capacitor; the two series connection inductors comprise a first series inductor and a second series inductor; and according to the filter, a five-order parallel resonance structure is adopted, out-of-band suppression is deepened through the five parallel resonance units, a cross coupling capacitor, a parallel inductor and two series connection inductors are innovatively introduced.

A multilayer substrate includes a pair of first capacitor electrodes, a pair of second capacitor electrodes, and a dielectric substrate. Electrodes of the pair of first capacitor electrodes are disposed in dielectric substrate so as to face each other in a thickness direction of the dielectric substrate. Electrodes of the pair of second capacitor electrodes are disposed in the dielectric substrate so as to face each other in the thickness direction. A first element and a second element that are disposed in or on the dielectric substrate, and the pair of second capacitor electrodes, the pair of first capacitor electrodes, and a ground electrode that are disposed in the dielectric substrate are arranged in the stated order in the thickness direction. The pair of second capacitor electrodes at least partially overlaps the pair of first capacitor electrodes when viewed in plan in the thickness direction.

An electronic component includes a single-layer glass plate, an outer-surface conductor that is disposed above an outer surface of the single-layer glass plate and that is at least a part of an electrical element, and a terminal electrode that is a terminal of the electrical element. The terminal electrode is disposed above the outer surface of the single-layer glass plate and being electrically connected to the outer-surface conductor.

A package on a die having a low resistive substrate, wherein the package comprises an inductor on low-k dielectric and a capacitor on high-k dielectric. The stacked arrangement having different dielectric materials may provide an inductor having a high Q-factor while still having a high capacitance density. In addition, moving the inductor from the die to the package and fabricating the high density capacitor on the package reduces the silicon area required permitting smaller RF/analog blocks on the chip.

A multilayered filter device includes a multilayer stack, a band pass filter, a first band elimination filter, and a second band elimination filter. The band pass filter and the first and second band elimination filters are each constructed using the multilayer stack. The band pass filter includes a plurality of first resonators with open ends. Each band elimination filter includes a connection path, and a second resonator coupled to the connection path. The connection path includes an impedance transformer. The second resonator includes a conductor line constituting a distributed constant line.

An LC resonator includes first and second plane electrodes, a first line electrode, a first and second via conductors, and a third plane electrode. The second plane electrode is opposed to at least a portion of the first plane electrode in a specific direction. The first via conductor and the second via conductor extend from the first line electrode in the specific direction to be connected to the first plane electrode and the second plane electrode, respectively. The third plane electrode is opposed to at least a portion of the second plane electrode in the specific direction. The second plane electrode is between the first plane electrode and the third plane electrode in the specific direction.

The invention discloses a power noise suppression circuit applied to a power system. The power noise suppression circuit comprises at least one power noise to heat converter and at least one anti-power noise transmitted unit. When a power noise within a specific frequency band enters the power noise suppression circuit, the power noise to heat converter converts the power noise to a thermal energy, and the anti-power noise transmitted unit reflects the power noise within the specific frequency band to the power noise to heat converter. Accordingly, the power noise within the specific frequency band can be suppressed and absorbed in the power noise suppression circuit, so as to maintain the stability of the power system.

An electronic device includes a magnetic assembly with a multilevel lamination or metallization structure having a core layer, dielectric layers and conductive features formed in metal layers on or between the dielectric layers in respective planes of orthogonal first and second directions and stacked along an orthogonal third direction. The conductive features include first and second patterned conductive features forming first and second windings, first and second conductive capacitor plates, and first and second conductive field plates, in which the first conductive capacitor plate is between the first conductive field plate and the core layer along the third direction and the second conductive capacitor plate is between the second conductive field plate and the core layer along the third direction.

A multilayer substrate includes a stacked body, coil conductor patterns, and a connection conductor pattern. The stacked body includes insulating layers. A first coil conductor pattern is provided on the front surface of an insulating layer and has a wound shape including outer and inner end portions. A second coil conductor pattern is provided on the front surface of the insulating layer and includes an end portion. The connection conductor pattern is provided in the stacked body, and connects the coil conductor patterns. The outer end portion is connected to a terminal conductor on a back surface of the stacked body. The end portion of the second coil conductor pattern is connected to the terminal conductor on the back surface of the stacked body. The first coil conductor pattern extends parallel or substantially parallel to the second coil conductor pattern along an outer periphery of the second coil conductor pattern.