A multi-port coupled inductor with interference suppression is provided with a first signal port connected to a first resistor port via a first inductor; a second resistor port connected to the first resistor port via a second inductor; a second signal port connected to the second resistor port via a third inductor; a third resistor port connected to the first resistor port via a first resistor; a fourth resistor port connected to the third resistor port via a fourth inductor and to the second resistor port via a second resistor; a third signal port connected to the third resistor port via a fifth inductor; and a fourth signal port connected to the fourth resistor port via a sixth inductor.

A multi-port coupled inductor with interference suppression is provided with a first signal port connected to a first resistor port via a first inductor; a second resistor port connected to the first resistor port via a second inductor; a second signal port connected to the second resistor port via a third inductor; a third resistor port connected to the first resistor port via a first resistor; a fourth resistor port connected to the third resistor port via a fourth inductor and to the second resistor port via a second resistor; a third signal port connected to the third resistor port via a fifth inductor; and a fourth signal port connected to the fourth resistor port via a sixth inductor.

Embodiments herein describe placing a filter network at one of the inputs of the comparator to avoid injecting unequal amounts of kickback noise into the inputs of the comparator. In one embodiment, the filter network matches the impedance seen at the inputs of the comparator. As a result, the amount of kickback noise is essentially equal at the inputs even though the input signals may be at different frequencies. Thus, the kickback noise is essentially cancelled out so that this noise has little to no impact on the output of the comparator.

Embodiments herein describe placing a filter network at one of the inputs of the comparator to avoid injecting unequal amounts of kickback noise into the inputs of the comparator. In one embodiment, the filter network matches the impedance seen at the inputs of the comparator. As a result, the amount of kickback noise is essentially equal at the inputs even though the input signals may be at different frequencies. Thus, the kickback noise is essentially cancelled out so that this noise has little to no impact on the output of the comparator.

An electronic apparatus is described. The apparatus includes a circuit element configured to output a signal comprising a modulated frequency component. The apparatus also includes a filter arrangement comprising first, second and third notch filter arrangements, wherein each of the first and second notch filter arrangements comprise a first series inductor, and a series shunt configuration comprising a second inductor and a capacitor coupled in series and the third notch filter arrangement comprises a series inductor and a shunt capacitor, wherein each of the notch filter arrangements are configured to generate a notch in a frequency response to attenuate the output signal at a frequency of the modulated frequency component.

An electronic apparatus is described. The apparatus includes a circuit element configured to output a signal comprising a modulated frequency component. The apparatus also includes a filter arrangement comprising first, second and third notch filter arrangements, wherein each of the first and second notch filter arrangements comprise a first series inductor, and a series shunt configuration comprising a second inductor and a capacitor coupled in series and the third notch filter arrangement comprises a series inductor and a shunt capacitor, wherein each of the notch filter arrangements are configured to generate a notch in a frequency response to attenuate the output signal at a frequency of the modulated frequency component.

An integrated circuit includes an inverter, first and second capacitors, a resistor, and a transistor. The inverter has an input and an output. The first capacitor is coupled to a ground. The transistor has a first transistor terminal, a second transistor terminal, and a control input. The first transistor terminal is coupled to the first capacitor and the second transistor terminal is coupled to the input of the inverter. The second capacitor is coupled between the output of the inverter and the ground. The resistor is coupled between the output of the inverter and the first transistor terminal.

An integrated circuit includes an inverter, first and second capacitors, a resistor, and a transistor. The inverter has an input and an output. The first capacitor is coupled to a ground. The transistor has a first transistor terminal, a second transistor terminal, and a control input. The first transistor terminal is coupled to the first capacitor and the second transistor terminal is coupled to the input of the inverter. The second capacitor is coupled between the output of the inverter and the ground. The resistor is coupled between the output of the inverter and the first transistor terminal.

Active bias circuits for integrated devices are described. In one example, an active bias circuit includes a voltage control element to establish a control voltage, an active bias device to provide a power bias responsive to the control voltage, and a compensation circuit connected to the active bias device. The compensation circuit can be configured to set output impedance and compensate for parasitic capacitance of the active bias device. In another embodiment, the voltage control element can be omitted, and a control voltage can be relied upon to directly control the power bias output provided by the active bias device. The active bias circuit can be used to power a driver of an integrated optical transmitter, in one example, among other possible applications.

Active bias circuits for integrated devices are described. In one example, an active bias circuit includes a voltage control element to establish a control voltage, an active bias device to provide a power bias responsive to the control voltage, and a compensation circuit connected to the active bias device. The compensation circuit can be configured to set output impedance and compensate for parasitic capacitance of the active bias device. In another embodiment, the voltage control element can be omitted, and a control voltage can be relied upon to directly control the power bias output provided by the active bias device. The active bias circuit can be used to power a driver of an integrated optical transmitter, in one example, among other possible applications.