An LC resonator includes first and second plane electrodes, a first line electrode, a first and second via conductors, and a third plane electrode. The second plane electrode is opposed to at least a portion of the first plane electrode in a specific direction. The first via conductor and the second via conductor extend from the first line electrode in the specific direction to be connected to the first plane electrode and the second plane electrode, respectively. The third plane electrode is opposed to at least a portion of the second plane electrode in the specific direction. The second plane electrode is between the first plane electrode and the third plane electrode in the specific direction.

An integrated circuit including a first circuit module and a second circuit module is provided. A layer stack may include one or multiple metal layers with a power segment and a ground segment connected to the first circuit module and the second circuit module, which form a resonant current loop. A pickup loop may be inductively coupled to the resonant current loop to dampen its resonance, thereby making the IC compliant with its EMC requirements or removing functional errors such as problems in the signal or power integrity.

The technology relates to quantum computing devices and test arrangements for detecting information from the qubits of such devices. According to aspects of the technology, a Purcell filter is structured in a multi-pole architecture to provide a sharper filter response having a flatter signal pass band, sharper turn-off skirt, and enhanced out of band rejection. The system is able to determine the states of the qubits by detecting the frequency of the readout resonators of the test arrangement. The Purcell filter is configured to be sharply tuned to enable faster readout to avoid issues associated with a longer relaxation time (T1) of the qubits.

Disclosed is a system for transmitting/receiving wireless power, the system includes a wireless power transmitter including an inverter that generates a first current using an input power source, a first resonant circuit to which the first current is applied to transmit a power signal, and a first controller that controls the inverter, and a wireless power receiver including a second resonant circuit that receives the power signal, an impedance varying unit that varies an impedance of the second resonant circuit, and a second controller that controls the impedance varying unit, wherein the first controller controls the inverter to spread a frequency spectrum of the power signal, and the second controller controls the impedance varying unit such that the second resonant circuit resonates with the power signal generated from the first resonant circuit of the wireless power transmitter. Additional various embodiments recognized through the specification are possible.

A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.

A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.

A filter device is mounted on a module substrate and is shielded by a shield member. The filter device has first and second side surfaces opposed to each other. A ground terminal and signal terminals are formed on a bottom surface of the filter device. The shield member includes side wall portions facing the first and second side surfaces. The filter device includes plural LC parallel resonance circuits therein. The inductors of the LC parallel resonance circuits are arranged in parallel with the first side surface and the bottom surface. Each inductor extends upward from its end portion electrically connected to the ground terminal, extends from the first side surface toward the second side surface, and then extends toward the bottom surface. The gap between the first side surface and the corresponding side wall portion is smaller than that between the second side surface and the corresponding side wall portion.

A filter device is mounted on a module substrate and is shielded by a shield member. The filter device has first and second side surfaces opposed to each other. A ground terminal and signal terminals are formed on a bottom surface of the filter device. The shield member includes side wall portions facing the first and second side surfaces. The filter device includes plural LC parallel resonance circuits therein. The inductors of the LC parallel resonance circuits are arranged in parallel with the first side surface and the bottom surface. Each inductor extends upward from its end portion electrically connected to the ground terminal, extends from the first side surface toward the second side surface, and then extends toward the bottom surface. The gap between the first side surface and the corresponding side wall portion is smaller than that between the second side surface and the corresponding side wall portion.

An apparatus is disclosed for harmonic reduction with filtering. In example aspects, the apparatus includes a filter circuit with first and second filter ports, first and second lattice filters, and first and second signal manipulator circuits. The first signal manipulator circuit includes a first port, a second port, and a third port coupled to the first filter port. The first signal manipulator circuit splits an input signal into multiple split signals, shifts a phase thereof to produce at least one phase-shifted split signal, and provides the phase-shifted split signal to the first and second ports. The first lattice filter is coupled to the first port, and the second lattice filter is coupled to the second port. The second signal manipulator circuit includes a first port coupled to the first lattice filter, a second port coupled to the second lattice filter, and a third port coupled to the second filter port.

A multi-port coupled inductor with interference suppression is provided with a first signal port connected to a first resistor port via a first inductor; a second resistor port connected to the first resistor port via a second inductor; a second signal port connected to the second resistor port via a third inductor; a third resistor port connected to the first resistor port via a first resistor; a fourth resistor port connected to the third resistor port via a fourth inductor and to the second resistor port via a second resistor; a third signal port connected to the third resistor port via a fifth inductor; and a fourth signal port connected to the fourth resistor port via a sixth inductor.