Examples include an inductor assembly and an apparatus comprising and a transistor amplifier and an impedance matching network. The impedance matching network comprises a circuit board, an inductance block and a screw. The inductance block has a first leg mounted on a first contact plate of the circuit board and a second leg mounted on a second contact plate of the circuit board. The screw is screwable into the inductance block such that a threaded portion of the screw engages with threaded portions of the first leg and the second leg to form a conductive path connecting the first contact plate with the second contact plate. The length of the conductive path and a value of the inductance of the conductive path are adjustable by adjusting a height of the screw within the inductance block.

An integrated circuit (202) for use in a differential network bus node (200) comprising: a transceiver (212) having a first transceiver input-output terminal (214) and a second transceiver input-output terminal (216); a physical layer high terminal (208) connected to the first transceiver input-output-terminal (214); a physical layer low terminal (210) connected to the second transceiver input-output terminal (216); and a physical layer interface circuit (234) comprising: a first low frequency RC matching circuit (236) and a first high frequency RC matching circuit (240) each connected between the first transceiver input-output-terminal (214) and a first reference terminal (238); and a second low frequency RC matching circuit (242) and a second high frequency RC matching circuit (246) each connected between the second transceiver input-output terminal (216) and a second reference terminal (244).

A digital-to-analog converter is provided. The digital-to-analog converter includes a first plurality of digital-to-analog converter cells configured to generate a first analog signal. Further, digital-to-analog converter includes a second plurality of digital-to-analog converter cells configured to generate a second analog signal. The first analog signal and the second analog signal form a differential signal pair. Further, the digital-to-analog converter includes a transmission line transformer comprising a first input node coupled to the first plurality of digital-to-analog converter cells, a second input node coupled to the second plurality of digital-to-analog converter cells, and a first output node. The transmission line transformer is configured to present a first impedance at the first and second input nodes and to present a second impedance at the first output node.

A matching device includes a directional coupler, a matching circuit including a first variable capacitance capacitor and a second variable capacitance capacitor, and a control unit. The control unit calculates a reflection coefficient on the basis of a forward power and a reflected power that are detected by the directional coupler, changes the capacitance value of the first variable capacitance capacitor and the capacitance value of the second variable capacitance capacitor such that the calculated reflection coefficient becomes smaller, and makes the cycle of calculation of the set values of the capacitance value of the first variable capacitance capacitor and the capacitance value of the second variable capacitance capacitor shorter than the cycle of acquisition of the capacitance value of the first variable capacitance capacitor and the capacitance value of the second variable capacitance capacitor.

A Doherty power amplifier circuit having a main power amplification device, an auxiliary power amplification device arranged in parallel with the main power amplification device, and a load modulation circuit comprising a harmonic injection circuit connected with respective outputs of the main power amplification device and the auxiliary power amplification device. The harmonic injection circuit is arranged to transfer harmonic components generated at the main power amplification device to the auxiliary power amplification device and harmonic components generated at the auxiliary power amplification device to the main power amplification device, when both the main and auxiliary power amplification devices are operating, for modulating the respective outputs of the main power amplification device and the auxiliary power amplification device.

Embodiments of a circuit, system, and method are disclosed. In an embodiment, a circuit includes a first microstrip transmission line, a second microstrip transmission line, and a slotline formation, wherein the slotline formation extends between the first microstrip transmission line and the second microstrip transmission line so that the slotline formation is configured to electromagnetically couple the first microstrip transmission line to the second microstrip transmission line during operation of the circuit. In addition, the circuit includes at least one controllable capacitance circuit electrically connected to at least one of the first microstrip transmission line and the second microstrip transmission line, wherein a magnitude of capacitance of the at least one controllable capacitance circuit is controllable (e.g., in response to a capacitance control signal received at a control interface).

Automatic impedance matching measures the RF source frequency and RF load voltage, current and phase to determine a single match solution for a capacitive value of the variable capacitor and an inductive value for the variable inductor, and whether a shunt reactance is coupled to the RF source or RF load. Once the capacitance and inductance values for a match solution are determined they are contemporaneously selected without any iterative searching necessary for the match solution.

A matching box comprises a directional coupler that detects forward waves and reflected waves; a matching circuit having a first variable capacitance capacitor, a second variable capacitance capacitor, and inductance; and a control unit that calculates a reflection coefficient on the basis of the forward waves and the reflected waves, and controls a capacitance value VC1 of the first variable capacitance capacitor and a capacitance value VC2 of the second variable capacitance capacitor, wherein the control unit changes VC2 if the distance between a matching circle drawn by the trajectory of the reflection coefficient passing through a matching point on a Smith chart, and the calculated reflection coefficient is greater than a prescribed value, and changes VC1 if such distance is set to be no greater than the prescribed value and when the value of such distance becomes no greater than the prescribed value, thereby reducing the reflection coefficient.

Automatic impedance matching measures the RF source frequency and RF load voltage, current and phase to determine a single match solution for a capacitive value of the variable capacitor and an inductive value for the variable inductor, and whether a shunt reactance is coupled to the RF source or RF load. Once the capacitance and inductance values for a match solution are determined they are contemporaneously selected without any iterative searching necessary for the match solution.

A wideband impedance matching network comprises a fundamental output MN including a first portion and a second portion and a harmonic compensation MN including a harmonic MN portion and a harmonic MN backside-via inductor formed on an outer surface of a harmonic MN backside via hole penetrating through a semiconductor substrate. The first portion, the second portion and the harmonic MN portion are formed on the semiconductor substrate. A second terminal of the first portion and a first terminal of the second portion are connected to an RF output terminal. A first terminal of the harmonic MN portion and a first terminal of the first portion are connected to an RF input terminal. A second terminal of the harmonic MN portion is connected to a first terminal of the harmonic MN backside-via inductor. A second terminal of the harmonic MN backside-via inductor is grounded.