A variable circuit includes a switch including a plurality of input terminals and a plurality of output terminals and an external wiring line. The multiple input terminals include a first input terminal to which a first input signal is inputted and a second input terminal to which a second input signal is inputted. The multiple output terminals include a first output terminal from which a first output signal is outputted and a second output terminal from which a second output signal is outputted. The switch is capable of forming at least one internal connection path electrically connecting any one of the multiple input terminals and any one of the multiple output terminals. The external wiring line is disposed outside the switch and is configured to electrically connect the second output terminal to the second input terminal.

Novel tools and techniques are provided for implementing a filter circuit array, and more particularly methods, systems, and apparatuses are provided for implementing a filter circuit array in a semiconductor package or a chip package. In an embodiment, a filter array can include a first filter circuit and a first resistive circuit connected to the first filter circuit. In various cases, when the first filter circuit is operational, the first filter circuit is configured to transmit or receive one or more first signals and the first resistive circuit is unterminated. In other cases, when the first filter circuit is not operational, the first filter circuit is configured to terminate via the first resistive circuit.

A branching filter includes a first diplexer, a second diplexer, and a third diplexer. An input end of the first diplexer is connected to an input port. An input end of the second diplexer and an input end of the third diplexer are connected to two output ends of the first diplexer, respectively. Two output ends of the second diplexer are connected to first and second output ports, respectively. Two output ends of the third diplexer are connected to third and fourth output ports, respectively.

An example power splitter and associated methods are provided herein. In some embodiments, the power splitter may include a first port. In some embodiments, the power splitter may include a plurality of second ports. In some embodiments, the power splitter may include one or more low pass elements. In this regard, the one or more low pass elements may include at least one series inductor and at least one shunt capacitor. In some embodiments, the power splitter may include one or more high pass elements. In this regard, the one or more high pass elements may include at least one series capacitor and at least one shunt inductor. In some embodiments, each of the one or more high pass elements and each of the one or more low pass elements is electrically connected to the first port and the plurality of second ports.

A branching filter includes a first filter and a second filter. The first filter includes a first inductor. The second filter includes a second inductor. Each of the first inductor and the second inductor is wound about an axis extending in a direction orthogonal to a stacking direction of a stack. The first inductor is arranged at a position closer to a first end portion of the stack than to a second end portion of the stack. The second inductor is arranged at a position closer to the second end portion than to the first end portion.

A transceiver circuit implemented on one or more integrated circuits, the transceiver comprising: a signal transmitter for forming a radio signal for transmission; a signal receiver for performing receive processing on a received radio signal; and a cancellation circuit for at least partially cancelling components of the signal for transmission in the signal receiver, the cancellation circuit being arranged to receive an input from the signal transmitter and to provide a cancellation output to the signal receiver, the cancellation circuit being configured to form the cancellation output in dependence on both the input from the signal transmitter and a response received from a first external connection pad of one of the integrated circuits.

Wireless circuitry can be provided with a first amplifier and a hybrid coupler having a first port configured to receive a vertically polarized signal from an antenna, a second port configured to receive a horizontally polarized signal the antenna, and a third port coupled to an input of the first amplifier. The wireless circuitry can further include a second amplifier having an input coupled to a fourth port of the hybrid coupler, wherein the hybrid coupler comprises a quadrature hybrid coupler. The wireless circuitry can further include first circuits coupled to an output of the first amplifier and configured to produce first and second baseband signals, second circuits coupled to an output of the second amplifier and configured to produce third and fourth baseband signals, and processing circuitry configured to selectively combine the first and third baseband signals and selectively combine the second and fourth baseband signals.