Patent classifications
H03H7/487
Symmetrical front-end chip for dual-pole antenna array
An apparatus includes a package and a beam former circuit. The package may be configured to be mounted on an antenna array at a center of four antenna elements. Each antenna element may include a dual-pole antenna having a vertical feed and a horizontal feed. The beam former circuit may be (i) disposed in the package, (ii) have a plurality of pairs of ports, (iii) configured to generate a plurality of radio-frequency signals in the ports while in a transmit mode and (iv) configured to receive the radio-frequency signals at the ports while in a receive mode. Each pair of the ports is configured to be directly connected to a respective one of the antenna elements. All of the ports may be spatially routed into alignment with the vertical feeds and the horizontal feeds in a single conductive plane of the antenna array.
Directional coupler
Certain aspects of the present disclosure provide a directional coupler. In certain aspects, the directional coupler generally includes a first inductor and a second inductor wirelessly coupled to the first inductor. In certain aspects, the directional coupler generally includes an input port at a first terminal of the first inductor and a transmitted port at a second terminal of the first inductor. In certain aspects, the directional coupler generally includes a coupled port at a first terminal of the second inductor and an isolated port at a second terminal of the second inductor. In certain aspects, the directional coupler generally includes a first complex impedance component directly coupled to the isolated port and a second complex impedance component directly coupled to the coupled port.
Quadrature combined doherty amplifiers
Apparatus and methods for quadrature combined Doherty amplifiers are provided herein. In certain embodiments, a separator is used to separate a radio frequency (RF) input signal into a plurality of input signal components that are amplified by a pair of Doherty amplifiers operating in quadrature. Additionally, a combiner is used to combine a plurality of output signal components generated by the pair of Doherty amplifiers, thereby generating an RF output signal exhibiting quadrature balancing.
Distributed transceiver signal switching circuit
An apparatus includes a package and a chip. The package may comprise (i) a plurality of bonding pads, (ii) a plurality of combiner/splitter circuits, and (iii) a plurality of bumps. The bonding pads may be configured to electrically connect the package with a printed circuit board substrate. The combiner/splitter circuits generally connect each of the bonding pads to two respective bumps of the plurality of bumps. The chip is generally disposed in the package. The chip may comprise a plurality of contact pads and a plurality of transceiver channels. Each of the transceiver channels may comprise a radio-frequency input and a radio-frequency output. The radio-frequency input and the radio-frequency output of each transceiver channel are generally connected to respective contact pads of the chip. The respective contact pads of each transceiver channel are generally coupled to a respective bonding pad of the package via the two respective bumps.
CIRCUIT WITH FIRST AND SECOND TERMINALS COUPLED TOGETHER VIA A BRANCH-INTERCONNECTION ARRANGEMENT
A circuit comprising: a common terminal, first terminal and second terminal, wherein the common terminal is coupled to a first and second circuit branch at a branch node; wherein the first/second circuit branches include a respective first/second quarter wavelength transmission line having a first end coupled to the branch node and a second end respectively coupled to the first/second terminal; wherein the first and second terminals are coupled together via a branch-interconnection arrangement; wherein the circuit comprises: a first switched arrangement comprising a first switch having a first and second switch-terminal, wherein the first switch-terminal is coupled to the common terminal, and wherein a first resistor and a first capacitor are arranged in parallel and coupled between the second switch-terminal and a reference terminal; and a second switched arrangement coupled to the first terminal, wherein the first quarter wavelength transmission line is coupled between the first and second switched arrangements.
DUPLEXER MEASUREMENT AND TUNING SYSTEMS
Systems and methods combine a test signal with a wanted (downlink or uplink) signal at an input of a duplexer of a communication device, and receive the test signal at an output of the duplexer. The test signal may include a radio frequency signal having less power than the wanted signal to avoid interference, or a digital signal that is added to or extracted from the wanted signal when the wanted signal does not have a radio frequency. A processor of the communication device causes the duplexer to operate in a tuning state (e.g., to transmit signals having a transmission frequency and receive signals having a receive frequency). The measurement system determines a difference or ratio in power between the test signal at the duplexer output and the duplexer input, and adjusts the tuning state based on the difference or ratio (e.g., to decrease or minimize the difference or ratio).
DUPLEXER MEASUREMENT AND TUNING SYSTEMS
Systems and methods combine a test signal with a wanted (downlink or uplink) signal at an input of a duplexer of a communication device, and receive the test signal at an output of the duplexer. The test signal may include a radio frequency signal having less power than the wanted signal to avoid interference, or a digital signal that is added to or extracted from the wanted signal when the wanted signal does not have a radio frequency. A processor of the communication device causes the duplexer to operate in a tuning state (e.g., to transmit signals having a transmission frequency and receive signals having a receive frequency). The measurement system determines a difference or ratio in power between the test signal at the duplexer output and the duplexer input, and adjusts the tuning state based on the difference or ratio (e.g., to decrease or minimize the difference or ratio).
DISTRIBUTED TRANSCEIVER SIGNAL SWITCHING CIRCUIT
An apparatus includes a package and a chip. The package may comprise (i) a plurality of bonding pads, (ii) a plurality of combiner/splitter circuits, and (iii) a plurality of bumps. The bonding pads may be configured to electrically connect the package with a printed circuit board substrate. The combiner/splitter circuits generally connect each of the bonding pads to two respective bumps of the plurality of bumps. The chip is generally disposed in the package. The chip may comprise a plurality of contact pads and a plurality of transceiver channels. Each of the transceiver channels may comprise a radio-frequency input and a radio-frequency output. The radio-frequency input and the radio-frequency output of each transceiver channel are generally connected to respective contact pads of the chip. The respective contact pads of each transceiver channel are generally coupled to a respective bonding pad of the package via the two respective bumps.
Fast memory access control for phase and gain
An apparatus includes a switching circuit and a plurality of registers. The switching circuit may be configured to generate a sequence of pulses in a plurality of control signals in response to a plurality of cycles of an enable signal. The registers may be hardwired as a plurality of subsets. Each of the subsets of the registers may be configured to (a) buffer a plurality of setting values received from a memory and (b) present the setting values from the registers to a plurality of transceiver circuits while a corresponding one of the control signals is in an active state. The transceiver circuits may be updated with the setting values from the registers within a predetermined time.
Distributed transceiver signal switching circuit
An apparatus include a package, a chip and a plurality of bumps. The package may include (i) a plurality of bonding pads configured to exchange a plurality of radio-frequency signals with an antenna panel and (ii) a plurality of transmission lines configured to exchange the radio-frequency signals with the bonding pads. Two of the transmission lines may be connected to each of the bonding pads. The chip may be disposed in the package and may include (i) a plurality of transceiver channels configured to exchange the radio-frequency signals with the transmission lines and (ii) a plurality of switches configured to switch the radio-frequency signals to a signal ground. The bumps may be configured to exchange the radio-frequency signals between the transmission lines of the package and the transceiver channels of the chip. The transmission lines, the bumps and the switches may form a plurality of transmit/receive switches.