A method of testing a therapeutic pulse generator circuit is disclosed. The method includes charging the pulse generator circuit to a first charge voltage, with the pulse generator circuit, delivering a first voltage pulse to a load through an electrode, and determining an impedance of the load with the first voltage pulse. The method also includes comparing the impedance with an expected impedance, as a result of the comparison, determining to deliver a second voltage pulse to the load based, and delivering the second voltage pulse to the load, where at least one of the first and second voltage pulses is therapeutic to the load.

A method of testing a therapeutic pulse generator circuit is disclosed. The method includes charging the pulse generator circuit to a first charge voltage, with the pulse generator circuit, delivering a first voltage pulse to a load through an electrode, and determining an impedance of the load with the first voltage pulse. The method also includes comparing the impedance with an expected impedance, as a result of the comparison, determining to deliver a second voltage pulse to the load based, and delivering the second voltage pulse to the load, where at least one of the first and second voltage pulses is therapeutic to the load.

An active circuit includes an active element, an input unit, and a bypass unit. The active element is coupled to an output terminal of the active circuit for outputting an output signal. The input unit is coupled to an input terminal of the active circuit, and is coupled to an input terminal of the active element through a node. The input unit adjusts a capacitance value of the input unit according to a first control signal. The bypass unit is coupled to an output terminal of the input unit through the node, and is coupled to the output terminal of the active circuit. The bypass unit turns on or off a signal bypassing path according to a second control signal.

A line driver circuit having an amplifier circuit having a differential output, the differential output including a first output terminal and a second output terminal and an impedance switching circuit coupled between the first output terminal and the second output terminal of the amplifier circuit, wherein the impedance switching circuit is configured to reduce or maintain impedance across the first output terminal and the second output terminal of the amplifier circuit.

A line driver circuit having an amplifier circuit having a differential output, the differential output including a first output terminal and a second output terminal and an impedance switching circuit coupled between the first output terminal and the second output terminal of the amplifier circuit, wherein the impedance switching circuit is configured to reduce or maintain impedance across the first output terminal and the second output terminal of the amplifier circuit.

In one embodiment, an RF impedance matching network utilizing at least one electronically variable capacitors (EVC) is disclosed. Each EVC includes discrete capacitors operably coupled in parallel, the discrete capacitors including fine capacitors and coarse capacitors. A control circuit determines a parameter related to the plasma chamber and, based on the parameter, determines which of the coarse capacitors and which of the fine capacitors to have switched in to cause an impedance match. The increase of the variable total capacitance of each EVC is achieved by switching in more of the coarse capacitors or more of the fine capacitors than are already switched in without switching out a coarse capacitor that is already switched in.

In one embodiment, an RF impedance matching network utilizing at least one electronically variable capacitors (EVC) is disclosed. Each EVC includes discrete capacitors operably coupled in parallel, the discrete capacitors including fine capacitors and coarse capacitors. A control circuit determines a parameter related to the plasma chamber and, based on the parameter, determines which of the coarse capacitors and which of the fine capacitors to have switched in to cause an impedance match. The increase of the variable total capacitance of each EVC is achieved by switching in more of the coarse capacitors or more of the fine capacitors than are already switched in without switching out a coarse capacitor that is already switched in.

An illustrative embodiment of a packaged integrated circuit includes: an integrated circuit chip having a SerDes signal pad; and a package substrate having a core via and an arrangement of micro-vias connecting the SerDes signal pad to an external contact for solder ball connection to a PCB trace. The core via has a first parasitic capacitance, the solder ball connection is associated with a second parasitic capacitance, and the arrangement of micro-vias provides a pi-network inductance that improves connection impedance matching. An illustrative method embodiment includes: obtaining an expected impedance of the PCB trace; determining parasitic capacitances of a core via and a solder ball connection to the PCB trace; minimizing the core via capacitance; calculating a pi-network inductance that improves impedance matching with the PCB trace; and adjusting a micro-via arrangement between the core via and the solder ball connection to provide the pi-network inductance.

An illustrative embodiment of a packaged integrated circuit includes: an integrated circuit chip having a SerDes signal pad; and a package substrate having a core via and an arrangement of micro-vias connecting the SerDes signal pad to an external contact for solder ball connection to a PCB trace. The core via has a first parasitic capacitance, the solder ball connection is associated with a second parasitic capacitance, and the arrangement of micro-vias provides a pi-network inductance that improves connection impedance matching. An illustrative method embodiment includes: obtaining an expected impedance of the PCB trace; determining parasitic capacitances of a core via and a solder ball connection to the PCB trace; minimizing the core via capacitance; calculating a pi-network inductance that improves impedance matching with the PCB trace; and adjusting a micro-via arrangement between the core via and the solder ball connection to provide the pi-network inductance.

This disclosure relates to apparatus and methods for radio-frequency (RF) switching circuits, and more particularly for a PIN diode driver circuit for high speed, high repetition rate and/or high power applications. The PIN diode driver may include a dual voltage reverse bias provided to the PIN diode, which dual voltage reverse bias may be provided by a first, relatively lower voltage, power supply and a second, relatively higher voltage, power supply. The relatively lower voltage is to discharge an intrinsic layer of the PIN diode at a lower voltage than during reverse bias of the PIN diode at the second relatively higher bias voltage in order to reduce overall power consumption.