An attenuator having an impedance that is controllable by a first setpoint signal is coupled to a transmission line. A matching circuit having an impedance that is controllable by a second setpoint signal is also coupled to the transmission line. A transformer circuit block also coupled to the transmission line has a complex impedance. A control circuit sets the first and second setpoint signals so as to control a conjugate impedance relationship between the variable impedances presented by the attenuator and matching circuit relative to the complex impedance of the transformer circuit.

An attenuator having an impedance that is controllable by a first setpoint signal is coupled to a transmission line. A matching circuit having an impedance that is controllable by a second setpoint signal is also coupled to the transmission line. A transformer circuit block also coupled to the transmission line has a complex impedance. A control circuit sets the first and second setpoint signals so as to control a conjugate impedance relationship between the variable impedances presented by the attenuator and matching circuit relative to the complex impedance of the transformer circuit.

The present disclosure relates to a balun arrangement (1, 1, 1) comprising a single-ended port (2, 2; 17, 26), a differential port arrangement (61), a coupled first and second transmission line section (5, 6) constituting a first coupled pair (7), and a third and fourth coupled transmission line section (8, 9) constituting a second coupled pair (10). The first transmission line section (5) is connected between a first coupled pair first port (11) and the third transmission line section (8), the second transmission line section (6) is connected between a first coupled pair second port (12) and the first differential port (3), the third transmission line section (8) is connected between a second coupled pair first port (13) and the first transmission line section (5), and the fourth transmission line section (9) is connected between a second coupled pair second port (14) and the second differential port (4). For one coupled pair (7, 10), the first port (11, 13) is connected to the single-ended port (2, 2; 17, 26), and the second port (12, 14) is connected to ground. For the other coupled pair (10, 7), the first port (13, 11) is connected to ground, and the second port (14, 12) is connected to open circuit (15, 15).

The present disclosure relates to a balun arrangement (1, 1, 1) comprising a single-ended port (2, 2; 17, 26), a differential port arrangement (61), a coupled first and second transmission line section (5, 6) constituting a first coupled pair (7), and a third and fourth coupled transmission line section (8, 9) constituting a second coupled pair (10). The first transmission line section (5) is connected between a first coupled pair first port (11) and the third transmission line section (8), the second transmission line section (6) is connected between a first coupled pair second port (12) and the first differential port (3), the third transmission line section (8) is connected between a second coupled pair first port (13) and the first transmission line section (5), and the fourth transmission line section (9) is connected between a second coupled pair second port (14) and the second differential port (4). For one coupled pair (7, 10), the first port (11, 13) is connected to the single-ended port (2, 2; 17, 26), and the second port (12, 14) is connected to ground. For the other coupled pair (10, 7), the first port (13, 11) is connected to ground, and the second port (14, 12) is connected to open circuit (15, 15).

A radio frequency (RF) power amplifier (PA) for amplifying an RF signal between a source node and an output node, the RF PA including a silicon substrate with a complementary metal oxide semiconductor (CMOS) N-type transistor with a source region and a drain region fabricated therein. The source region includes the source node of the RF PA and the drain region includes the output node of the RF PA. The RF PA includes a planar resistor fabricated on the surface of the silicon substrate proximal to the drain region of the N-type transistor, wherein the resistor provides a thermal source for heating the RF PA; and a control circuit providing thermal heating to the RF PA by providing power to the planar resistor during RF signal bursts wherein the added thermal heating compensates transient heating within the transistor and results in a linear power amplification operation.

A radio frequency (RF) power amplifier (PA) for amplifying an RF signal between a source node and an output node, the RF PA including a silicon substrate with a complementary metal oxide semiconductor (CMOS) N-type transistor with a source region and a drain region fabricated therein. The source region includes the source node of the RF PA and the drain region includes the output node of the RF PA. The RF PA includes a planar resistor fabricated on the surface of the silicon substrate proximal to the drain region of the N-type transistor, wherein the resistor provides a thermal source for heating the RF PA; and a control circuit providing thermal heating to the RF PA by providing power to the planar resistor during RF signal bursts wherein the added thermal heating compensates transient heating within the transistor and results in a linear power amplification operation.

An apparatus and a method for multiplying a frequency of an input signal are provided. The apparatus may include a main differential device for converting the input signal into a first differential signal and a second differential signal, a first multiplying device for outputting a first signal obtained by multiplying a frequency of the first differential signal, a second multiplying device for outputting a second signal obtained by multiplying a frequency of the second differential signal, and a compositing device for outputting a third signal obtained by combining the first signal and the second signal to remove a fundamental frequency component.

An apparatus and a method for multiplying a frequency of an input signal are provided. The apparatus may include a main differential device for converting the input signal into a first differential signal and a second differential signal, a first multiplying device for outputting a first signal obtained by multiplying a frequency of the first differential signal, a second multiplying device for outputting a second signal obtained by multiplying a frequency of the second differential signal, and a compositing device for outputting a third signal obtained by combining the first signal and the second signal to remove a fundamental frequency component.

A vector sum circuit and a phase controller including the vector sum circuit are provided. The vector sum circuit includes an amplifier configured to amplify an input orthogonal signal by using a first metal oxide semiconductor field effect transistor (MOSFET), and a self body-biasing circuit comprising a resistor. The self body-biasing circuit is configured to connect a drain and a body of the first MOSFET to reduce a voltage connected to the body as a current at the drain increases.

A vector sum circuit and a phase controller including the vector sum circuit are provided. The vector sum circuit includes an amplifier configured to amplify an input orthogonal signal by using a first metal oxide semiconductor field effect transistor (MOSFET), and a self body-biasing circuit comprising a resistor. The self body-biasing circuit is configured to connect a drain and a body of the first MOSFET to reduce a voltage connected to the body as a current at the drain increases.