Patent classifications
H03H11/48
Adaptation of an antenna circuit for a near-field communication terminal
A method for adapting an antenna circuit including at least one first capacitive element and an inductive element in series, and at least one second capacitive element having a first electrode connected between the first capacitive element and the inductive element, wherein data representative of the voltage of said first electrode are applied to the second electrode of the second capacitive element.
Adaptation of an antenna circuit for a near-field communication terminal
A method for adapting an antenna circuit including at least one first capacitive element and an inductive element in series, and at least one second capacitive element having a first electrode connected between the first capacitive element and the inductive element, wherein data representative of the voltage of said first electrode are applied to the second electrode of the second capacitive element.
Active inductor and amplifier circuit
According to an embodiment, an active inductor has a first conductivity type MOS transistor with a source that is connected to an electrical power source supply line and a drain that is connected to an output terminal. It has a capacitance between a gate of the first conductivity type MOS transistor and the electrical power source supply line. It has a diode element that is connected between a drain and a gate of the first conductivity type transistor. It has an electric current source that supplies a bias electric current in a forward direction to the diode element.
Active inductor and amplifier circuit
According to an embodiment, an active inductor has a first conductivity type MOS transistor with a source that is connected to an electrical power source supply line and a drain that is connected to an output terminal. It has a capacitance between a gate of the first conductivity type MOS transistor and the electrical power source supply line. It has a diode element that is connected between a drain and a gate of the first conductivity type transistor. It has an electric current source that supplies a bias electric current in a forward direction to the diode element.
Method and apparatus for an active negative-capacitor circuit to cancel the input capacitance of comparators
A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator. The amplifiers may be abutted to one another such that an active transistor of a first differential stage in a first amplifier behaves as a dummy transistor for an adjacent differential stage in a second amplifier.
VARIABLE CAPACITANCE CIRCUIT, OSCILLATOR CIRCUIT, AND METHOD OF CONTROLLING VARIABLE CAPACITANCE CIRCUIT
A capacitor bank has a capacitance value that is discontinuous and has an extremely narrow variable range. Thus, in a case of obtaining a wide variable range of the capacitance value, a large number of capacitors are connected in parallel and used while being switched by switches. The present technology achieves at least one of: allowing the capacitance value of a variable capacitance circuit to be varied continuously by electrical control without increasing the parasitic capacitance; and decreasing the current consumption of an oscillator circuit using the variable capacitance circuit as compared to a conventional case. The variable capacitance circuit includes: a transconductance circuit that includes a MOS transistor; an inductor that is connected in parallel to the transconductance circuit; and a Gm control circuit that varies a transconductance of the MOS transistor.
Synthesized inductance circuit
An inductive synthesis circuit that mimics an ideal inductor over a wide range of inductance values, from less than 1 mH to more than 100 H, can be used in place of an inductor in any electrical circuit. One application of a synthesized inductor is in an integrated circuit in which it is impractical to construct a coil of wire. The inductive synthesis circuit is suitable for use in a calibration instrument for testing an inductance meter. The inductive synthesis circuit, together with a resistive synthesis circuit and a capacitive synthesis circuit, can be used to calibrate a multi-meter. Alternatively, the inductive synthesis circuit can be used to mimic an ideal inductor in a filter circuit that includes an inductor component, such as a high pass filter, a notch filter, or a band pass filter.
VIBRATION CONTROLLER
A vibration controller includes: a piezoelectric element fixed to an object of control; and a quasi-inductor circuit and a negative resistance circuit connected in series to the piezoelectric element.
OSCILLATOR WITH ACTIVE INDUCTOR
An apparatus comprises a piezoelectric resonator, a first active inductor circuit, and a second active inductor circuit. The piezoelectric resonator includes a first resonator terminal and a second resonator terminal. The first active inductor circuit is coupled between the first resonator terminal and a power supply terminal, the first active inductor circuit having a first impedance that reduces with a first frequency where the first frequency is at or above 1 GHz. The second active inductor circuit is coupled between the second resonator terminal and the power supply terminal, the second active inductor circuit having a second impedance that reduces with a second frequency where the second frequency is at or above 1 GHz.
GROUNDED CAPACITANCE MULTIPLIERS WITH ELECTRONIC TUNING POSSIBILITY USING SINGLE CURRENT FEEDBACK AMPLIFIER
The present invention relates to a capacitance multiplier topology suitable for both positive and negative capacitance multiplication having a minimum configuration consisting of a current feedback amplifier (CFOA), two resistors and a reference capacitor, with each C-multiplier having a respective capacitance amplification constant k which is externally adjustable. Such a capacitance multiplier has less parasitic components, occupies a smaller chip area with higher simulated capacitance value.