A tank circuit (200) includes a tunable resonator subcircuit (210) having a first control input and having an effective parallel resistance that varies with tuning of the tunable resonator subcircuit (210). The tank circuit (200) further comprises a variable negative-resistance subcircuit (250) having a second control input and coupled in parallel to the tunable resonator subcircuit (210), where the variable negative-resistance subcircuit (250) is configured to provide a variable negative resistance, responsive to the control input, so as to increase the effective parallel resistance of the tank circuit (200).

A circuit includes a filter, a first inverter, and a second inverter. The filter is coupled to an input of the first inverter. The second inverter includes an input and an output. The input of the second inverter is coupled to the output of the first inverter. The output of the second inverter is coupled to the input of the first inverter.

The invention relates to a tunable, silicon-based negative-resistance circuit (10, 30) and to an active filter (50) for E-band frequencies (60 to 90 GHz). A base of a transistor (11) is connected to an on-chip inductive transmission line (13) which has a length of approximately a quarter-wavelength at a frequency of 83.5 GHz. The transmission line connects a DC voltage source (14) to the base terminal of the transistor (11) in order to bias the base. Another DC voltage source (15) is connected to the collector of the transistor (11) to bias the transistor. A capacitor (16) operatively bypasses or decouples the voltage source (15) in order to shunt high frequencies or alternating current (AC) signals to ground. The emitter terminal of the transistor (11) is connected to ground through a resistor (18) to limit the collector current (l.sub.e). The circuit gives rise to improved quality factor of resonators.

A circuit includes a filter, a first inverter, and a second inverter. The filter is coupled to an input of the first inverter. The second inverter includes an input and an output. The input of the second inverter is coupled to the output of the first inverter. The output of the second inverter is coupled to the input of the first inverter.

Highly efficient digital domain sub-band based receivers and transmitters.

Highly efficient digital domain sub-band based receivers and transmitters.

A circuit comprising: a passive reactive component; and an active circuit, the active circuit arranged to increase the ac voltage difference across the reactive component by changing the current at an input to the reactive component and the current at an output of the reactive component by equal and opposite amounts. By increasing the current on one side of the resonant circuit and decreasing the current on the other side of the resonant circuit, the amount of current flowing through the resonant circuit is increased and thus the ac voltage difference across the inductor of the LC resonant circuit is increased. The Q of an inductor (the ratio of its imaginary to real impedance) is increased. In a filter, the improved Q provides a sharp, high rejection notch and faster pass-band to stop-band roll-off, thus improving the frequency response of the circuit.

A signal processing circuit includes a signal receiving circuit for generating a first input signal and a second input signal; a signal output circuit for generating a first output signal and a second output signal according to the first input signal and the second input signal; a negative impedance circuit, for amplifying the first input signal at the first input terminal to generate a first amplified input signal at the second output terminal, and for amplifying the second input signal at the second input terminal to generate a second amplified input signal at the first output terminal; a first capacitor; a second capacitor; wherein the first capacitor and the second capacitor have different DC voltage levels at both terminals, such that the impedance-signal variation rate of the negative impedance circuit is lower than a predetermined level.

A signal processing circuit includes a signal receiving circuit for generating a first input signal and a second input signal; a signal output circuit for generating a first output signal and a second output signal according to the first input signal and the second input signal; a negative impedance circuit, for amplifying the first input signal at the first input terminal to generate a first amplified input signal at the second output terminal, and for amplifying the second input signal at the second input terminal to generate a second amplified input signal at the first output terminal; a first capacitor; a second capacitor; wherein the first capacitor and the second capacitor have different DC voltage levels at both terminals, such that the impedance-signal variation rate of the negative impedance circuit is lower than a predetermined level.

A circuit includes a first operational amplifier having an inverting input and a non-inverting input, and a negative resistance circuit connected to the inverting input of the operational amplifier. The negative resistance circuit includes a second operational amplifier, a current source controlled by the second operational amplifier, and a cross-coupled transistor circuit having at least one transistor biased by a current produced by the current source.