According to one aspect of the invention, there is provided a method of operating a finite impulse response filter comprising an input; an output; and a plurality of storage elements, each coupled to the input via a sample switch and to the output via a transfer switch, the method comprising: during charging of the plurality of storage elements, applying a sample clock signal to each of the sample switches that achieves an operation mode where up to every one of the sample switches is simultaneously closed to connect all of the plurality of storage elements to the input; and during averaging of the plurality of storage elements, applying a transfer clock signal to each of the transfer switches to close one or more of the transfer switches to connect the storage elements, having charge stored therein, to the output.

Various signal processing techniques may benefit from appropriate handling. For example, certain signal processors may benefit from quarter wavelength unit delay and complex weight coefficient continuous-time filters. A method can include splitting an input signal into a plurality of signal paths. The method can also include complex weighting, for each signal path, a respective signal. The method can further include summing outputs of the signal paths. The method can additionally include providing an output comprising the sum of the signal paths. The complex weighting can be configured to independently control gain, phase and delay of the output signal over broadband.

A discrete time (DT) lowpass filter having various advantages is described. In an exemplary design, the DT lowpass filter includes a decimating DT filter (which may include a passive DT FIR filter and/or a passive DT IIR filter) and an active DT filter. The decimating DT filter receives a first DT signal at a first sample rate, filters and decimates the first DT signal by a factor of N, and provides a second DT signal at a second sample rate lower than the first sample rate. N may be greater than one. The active DT filter filters the second DT signal and provides a third DT signal at the second sample rate. A sampler samples a continuous time signal and provides the first DT signal. The sampler may further double the voltage of the first DT signal relative to the voltage of the continuous time signal.

A discrete time filter, DTF, is described that comprises a summing node; N parallel branches, each branch having a set of input unit sampling capacitances where each unit sampling capacitance is independently selectively coupleable to the summing node; and an output capacitance connected to the summing node. The output capacitance has a value equal to a sum of the sampling capacitances that are to be selectively connected to the summing node; and the discrete time filter further comprises an inductance connected between the summing node and the output capacitance.

There is provided a communication receiver comprising: an input for receiving a radio frequency, RF, input signal; and at least one finite impulse response, FIR, discrete time filter, DTF. The at least one FIR DTF comprises: an input circuit comprising an input port for sampling the RF input signal at a sampling frequency that is comparable to the input RF input signal; and N parallel branches, each branch having a set of input unit sampling capacitances, where each unit sampling capacitance is independently selectively coupleable to an output summing node. The input circuit is configured to convert an equivalent input impedance of the at least one FIR DTF around the sampling frequency to a real impedance.