A computer-implemented method of performing an operation on an array of values at a processing unit so as to perform a phase of the operation. For each of one or more one-dimensional sequences of values of the array of values a respective section of values of the one-dimensional sequence of values is assigned to each of a plurality of threads, and a first thread of the plurality of threads determines at least one contribution, from the section of values assigned to the first thread, to the phase of the operation that is to be completed by a second thread of the plurality of threads for a neighbouring section of values of the one-dimensional sequence of values. The at least one contribution is written to a memory, and a second thread of the plurality of threads reads the at least one contribution from the memory. and completes the phase of the operation for the neighbouring section of values assigned to the second thread in dependence on the at least one contribution read from the memory in order to generate a section of processed values.

A separable operation on a two-dimensional array of values is performed at a processing unit. A two-dimensional array of values is divided into a plurality of sub-arrays of values. An initial phase of the separable operation is performed for a sub-array to generate a processed value for each value of the sub-array. Threads write a first plurality of processed values to the memory over a plurality of writing steps. Each of the threads reads a second plurality of processed values from the memory over a plurality of reading steps. A subsequent phase of the separable operation is performed for the processed values read by the threads to generate an output value for each value of the sub-array in a transposed position; wherein a respective processed value is written into each of the memory banks of the memory in at least one of the writing steps, and a respective processed value is read from each of the memory banks of the memory in at least one of the reading steps.

A method and apparatus to compensate for distortion of a waveform due to the skin effect in a current shunt. The method includes modeling the complex impedance of the shunt as component complex impedances. By designing a filter corresponding to the component complex impedances, the distortion of a waveform across the shunt may be reversed to provide an accurate replica of the undistorted waveform.

A signal processing device includes a Kalman filter that performs Kalman filter processing based on an observation noise and a system noise and outputs a DC component of an input signal as an estimated value; and a monitoring circuit. The Kalman filter outputs an error covariance of the estimated value. The monitoring circuit performs a stop command of observation update processing in the Kalman filter, based on a result of determination processing based on the error covariance, with respect to a signal level corresponding to the input signal.

A processor includes a decode unit to decode a packed finite impulse response (FIR) filter instruction that indicates one or more source packed data operands, a plurality of FIR filter coefficients, and a destination storage location. The source operand(s) include a first number of data elements and a second number of additional data elements. The second number is one less than a number of FIR filter taps. An execution unit, in response to the packed FIR filter instruction being decoded, is to store a result packed data operand. The result packed data operand includes the first number of FIR filtered data elements that each is to be based on a combination of products of the plurality of FIR filter coefficients and a different corresponding set of data elements from the one or more source packed data operands, which is equal in number to the number of FIR filter taps.

This method for the non-linear estimation of no more than two mixed signals from separate sources, the time/frequency representation of which shows an unknown non-zero proportion of zero components, using an array made up of P>2 antennas, when the directional vectors U and V of the sources emitting these signals are additionally known or estimated, includes the following steps: a) Calculating the successive discrete Fourier transforms of the signal received by the antennas and sampled to obtain a time-frequency P-vector grid of the signal; each element of the grid being referred to as a box and containing a complex vector X forming a measurement; b) For each box, calculating the conditional expectation estimator of the signal, or of the signals, from the measurement X and an a priori probability density for the signals that is a Gaussian mixture.

A method for estimating a frequency band of a received signal is proposed. The method may include acquiring the received signal using an antenna, and determining a first signal detection number corresponding to a first wideband filter for passing the received signal among a plurality of wideband filters which are respectively set with a plurality of pre-determined wideband frequencies included in a wideband filter bank. The method may also include determining a second signal detection number corresponding to a second narrowband filter for passing the received signal among a plurality of narrowband filters which are respectively set with a plurality of pre-determined narrowband frequencies included in a narrowband filter bank. The method may further include estimating the frequency band of the received signal based on at least one of the first signal detection number and the second signal detection number.

A hardware downscaling module and downscaling methods for downscaling a two-dimensional array of values. The hardware downscaling unit comprises a first group of one-dimensional downscalers; and a second group of one-dimensional downscalers; wherein the first group of one-dimensional downscalers is arranged to receive a two-dimensional array of values and to perform downscaling in series in a first dimension; and wherein the second group of one-dimensional downscalers is arranged to receive an output from the first group of one-dimensional downscalers and to perform downscaling in series in a second dimension.

An electric linear actuator has a housing extending along a longitudinal axis. A spindle is provided in the housing and extends along the longitudinal axis. A rod is coaxially coupled to the spindle and extends from a proximal end located in the housing to a distal end located outside the housing. The rod is movable along the longitudinal axis in response to rotation of the spindle. A circuit board is located in the housing adjacent the proximal end of the rod. The circuit board includes a linear inductive sensor having a linear axis oriented parallel to the longitudinal axis. The linear inductive sensor senses an actual position of the proximal end of the rod.

A digital filter circuit includes retrieve stream data as a digital signal, and cyclically operate a first phase and a second phase. The circuit includes a short-term storage unit configured to store a local state variable, a long-term storage unit configured to store a global state variable, a first phase synthesizing unit that outputs the digital signal in the first phase under an influence of the local state variable stored in the short-term storage unit, and a second phase synthesizing unit that outputs the digital signal in the second phase under an influence of the global state variable stored in the long-term storage unit, where an output from the first phase synthesizing unit and an output from the second phase synthesizing unit are caused to generate an interference due to a phase shift.