When an instruction is provided for changing a characteristic of a set filter which includes a plurality of partial filters and forms a specified characteristic by combining a plurality of partial filters, a processor performs, as crossfading processing for a first filter and a second filter among the plurality of partial filters, fade-out processing of gradually decreasing a degree of contribution of the first filter to the characteristic and fade-in processing of gradually increasing a degree of contribution of the second filter to the characteristic. As a result, unnaturalness occurring at the time of changing filter characteristics is solved.

A filter circuit for use with a system configured to be coupled with an electrical load, the filter circuit comprising a first filter, wherein the first filter is configured to receive a first voltage and provide an output voltage, the output voltage being the first voltage after filtering by the first filter, and the filter circuit is configured to adjust the bandwidth of the first filter in response to a load transient.

The present disclosure relates to a concept of nonlinear signal processing which may be used for predistortion for RF power amplifiers. The concept includes generating time variant filter coefficients for a linear filter circuit based on a nonlinear mapping of an input signal, and filtering the input signal with the linear filter circuit using the time variant filter coefficients in order to generate a filtered output signal. Thus, it is proposed to implement a non-linear filter by a time-varying linear filter where the time-varying coefficients are derived from the input signal.

In some embodiments, a multiplier-based programmable filter comprises a pre-scaling circuit, a first multiplier circuit coupled to a first output of the pre-scaling circuit and a second output of the pre-scaling circuit, and a second multiplier circuit coupled to the first output of the pre-scaling circuit and the second output of the pre-scaling circuit. In some embodiments, the multiplier-based programmable filter also comprises a first adder coupled to a first output of the first multiplier circuit and a second output of the first multiplier circuit, a second adder coupled to a first output of the second multiplier circuit and a second output of the second multiplier circuit, first register coupled to an output of the first adder and an input of the second adder, and a second register coupled to an output of the second adder.

A filter coefficient calculation device includes a function unit that has a plurality of functions to be executed by an FIR filter, a function selection unit that selects one or a plurality of functions from among the plurality of functions, and a filter coefficient calculation unit that calculates a filter coefficient in the selected one or plurality of functions, and is configured such that the function unit includes a first transfer function calculation unit, a second transfer function calculation unit, and a third transfer function calculation unit which calculate a transfer function of the FIR filter in the respective functions, and the filter coefficient calculation unit performs inverse Fourier transform on the transfer function in the selected one function or a product of the transfer functions in the plurality of functions to obtain an impulse response of the FIR filter and calculates the impulse response as the filter coefficient.

An audio processor (1) includes a first filter coefficient calculator (31) that calculates a first filter coefficient so as to correspond to first gains for respective bands set by a user, a second filter coefficient calculator (32) that if values of third gains for respective bands of the first filter coefficient are greater than an absolute value of a second gain set by the user, calculates a second filter coefficient by limiting the values of the third gains for the respective bands to the amplitude value of the second gain, and a filtering unit (35) that filters an audio signal that has been transformed into a frequency-domain signal, using the second filter coefficient.

In a control method of controlling a frequency response of a filter for processing an audio signal, the frequency response is defined by an amplitude characteristic and a phase characteristic. The control method includes: acquiring a target amplitude characteristic, a target phase characteristic, and a latency value; obtaining a first frequency response in accordance with the target amplitude characteristic and the target phase characteristic; obtaining a second frequency response by modifying the first frequency response so that a latency of the second frequency response satisfies the latency value; and obtaining a third frequency response to be set for the filter by correcting the second frequency response, the second frequency response being corrected so as to reduce a difference between (i) an amplitude characteristic of the second frequency response and (ii) the target amplitude characteristic.

An audio sampler is provided, comprising a sample library having stored therein a plurality of main audio samples and a plurality of infinite impulse response (IIR) coefficients divided into subset, each subset corresponding to one of the main audio samples; a sample playback engine comprising an input receiving the main audio samples and outputting a playback signal; and, an IIR filter receiving the corresponding subset of IIR coefficients and applying the IIR filter to the main audio samples or to the playback signal.

A delta-sigma modulator (DSM) includes: a first summation circuit coupled to an input signal for subtracting an error feedback signal from the input signal; a tunable signal transfer function coupled to the first summation circuit for setting a desired pole in a frequency response of the DSM; a second summation circuit coupled to the tunable signal transfer function for adding a noise transfer function to an output of the tunable signal transfer function; and a quantizer coupled to the second summation circuit for quantizing an output of the second summation circuit to generate an output of the DSM. The output of the DSM is used as feedback to the first summation circuit as the error feedback signal, and the tunable signal transfer function is dynamically tuned to allow selecting and tuning a center frequency and a bandwidth of the DSM.

A detector device for calibrating a digital filter to replicate a transfer function of a signal processing apparatus, comprising: a first input to receive a first signal; a second input configured to receive a response signal of the signal processing apparatus to the first signal; a controllable FIR filter; a comparison-block to compare the phase and amplitude after a correction has been applied by the controllable FIR filter; a feedback loop; and an interpolation-block; wherein the at least one detector is configured to determine, at least, the feedback control signal at a first frequency and at a second frequency, and wherein the interpolation-block is configured to interpolate to determine calibration information for programming of the transfer function of said digital filter.