A clock generation circuit for generating a plurality of output clocks includes: a differential circuit for receiving a single input clock signal and outputting two differential clock signals, and a DC signal; a first polyphase filter for generating four clock signals from the differential clock signals which are a quadrature phase apart from each other; a plurality of setting buffers for setting a same DC point for the four clock signals and generating four resultant clock signals; coupled polyphase filters for generating four more clock signals which are a quadrature apart from each other, and outputting the resultant eight clock signals; a phase mixer, for generating eight output clock signals 45 degrees apart from each other; and a plurality of restoration buffers for setting a DC point for each of the eight clock signals and generating eight output clock signals all riding on a same DC point.

The disclosure describes devices and methods for starting up a microphone assembly. The device may be implemented on an integrated circuit that includes a direct current (DC) bias circuit. The DC bias circuit may be coupled to a transducer and configured to supply a DC bias signal to the transducer. The DC bias circuit includes a multi-stage charge pump and a low pass filter (LPF) circuit. The LPF circuit includes an adjustable resistance and a capacitor. A resistance of the adjustable resistance may be reduced to reduce the settling time of the LPF while starting (e.g., turning on) the microphone assembly.

A quadrature phase clock generator includes a tunable polyphase filter and a phase detector. The tunable polyphase filter is configured to receive an input clock signal and generate four quadrature phase clock signals. The phase detector is coupled to receive at least two of the four quadrature phase clock signals and generate a control signal adapted to tune the polyphase filter based on the received quadrature phase clock signals. Further, the phase detector is configured to provide the control signal to the polyphase filter in a feedback loop. Based on the control signal from the phase detector, the tunable polyphase filter generates four tuned quadrature phase clock signals as output phase clock signals.

According to one embodiment, in a biquad filter, an output terminal of a first integrator is connected to an input terminal in a negative pole side of a second integrator, an output terminal of the first integrator is connected to a first input terminal in a negative pole side of an adder through the inversion amplifier, an output terminal of the second integrator is connected to a second input terminal in the negative pole side of the adder, an input terminal to which an input signal is input is connected to a third input terminal in the negative side of the adder, and an output terminal of the adder is connected to an input terminal in a negative pole side of the first integrator.

A matching network circuit with tunable impedance and a tuning method thereof provided. The matching network circuit includes an inductor, a tunable capacitor, a tunable resistor and an auto-tuning circuit. The tunable capacitor is connected to the inductor. The tunable resistor is connected to the inductor. The auto-tuning circuit is connected to the tunable capacitor and the tunable resistor. Auto-turning circuit tunes the tunable capacitor and the tunable resistor over process variation.

An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and selectively coupling at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

A tunable filter is described where the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end tuning applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. The tunable filter topology is applicable for both transmit and receive circuits. A method is described where the filter characteristics are adjusted to account for and compensate for the frequency response of the antenna used in a communication system.

The disclosure describes devices and methods for starting up a microphone assembly. The device may be implemented on an integrated circuit that includes a direct current (DC) bias circuit. The DC bias circuit may be coupled to a transducer and configured to supply a DC bias signal to the transducer. The DC bias circuit includes a multi-stage charge pump and a low pass filter (LPF) circuit. The LPF circuit includes an adjustable resistance and a capacitor. A resistance of the adjustable resistance may be reduced to reduce the settling time of the LPF while starting (e.g., turning on) the microphone assembly.

A tunable filter is described where the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end tuning applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. The tunable filter topology is applicable for both transmit and receive circuits. A method is described where the filter characteristics are adjusted to account for and compensate for the frequency response of the antenna used in a communication system.

There is provided an electronic gain shaper for open loop adaptive optimising of broadband microwave circuits, the gain shaper comprising operating parameter selection means adapted for providing one or more operating parameters; and a lossy tuning element operably coupled to the operating parameter selection means, wherein, in use, the gain shaper is adapted for receiving an operating mode; retrieving an operating parameter from the operating parameter selection means in accordance with the operating mode; and configuring the lossy tuning element in accordance with the operating parameter.