Embodiments of the present disclosure may provide a circuit comprising a tank circuit. The tank circuit may include an inductor having a pair of terminals, a first pair of transistors, and a first pair of capacitors. Each transistor may be coupled between a respective terminal of the inductor and a reference voltage along a source-to-drain path of the transistor. Each capacitor may be provided in a signal path between an inductor terminal coupled to a respective first transistor in the first pair and a gate of a second transistor in the first pair.

Embodiments of the present disclosure may provide a circuit comprising a tank circuit. The tank circuit may include an inductor having a pair of terminals, a first pair of transistors, and a first pair of capacitors. Each transistor may be coupled between a respective terminal of the inductor and a reference voltage along a source-to-drain path of the transistor. Each capacitor may be provided in a signal path between an inductor terminal coupled to a respective first transistor in the first pair and a gate of a second transistor in the first pair.

Provided is a load drive slope control device that can reduce EMI noise, and power loss and heat generation when a drive transistor is turned on and off, and can prevent excessive high temperature-induced damage to the drive transistor at an excessive high temperature. Disclosed is a load drive control device including: a drive transistor that drives a load; a pre-driver that drives the drive transistor via an ON/OFF control terminal of the drive transistor; a capacitor that is connected to an input side of the pre-driver, a first current source that is ON/OFF controlled by a first signal, and generates current which is charged to the capacitor; and a second current source that is ON/OFF controlled by a second signal, and generates current for discharging the capacitor, in which an output voltage from the pre-driver is changed by charging or discharging the capacitor, the drive transistor is turned on and off by the output voltage from the pre-driver, and a linear ascending gradient and a linear descending gradient of the waveform of a voltage driving the load are obtained by turning on and off the drive transistor.

Provided is a load drive slope control device that can reduce EMI noise, and power loss and heat generation when a drive transistor is turned on and off, and can prevent excessive high temperature-induced damage to the drive transistor at an excessive high temperature. Disclosed is a load drive control device including: a drive transistor that drives a load; a pre-driver that drives the drive transistor via an ON/OFF control terminal of the drive transistor; a capacitor that is connected to an input side of the pre-driver, a first current source that is ON/OFF controlled by a first signal, and generates current which is charged to the capacitor; and a second current source that is ON/OFF controlled by a second signal, and generates current for discharging the capacitor, in which an output voltage from the pre-driver is changed by charging or discharging the capacitor, the drive transistor is turned on and off by the output voltage from the pre-driver, and a linear ascending gradient and a linear descending gradient of the waveform of a voltage driving the load are obtained by turning on and off the drive transistor.

A circuit may include a ring oscillator circuit and monitoring circuitry. The ring oscillator circuit has a group of inverters in a loop, whereby the group of inverters includes first, second, and third output nodes. The monitoring circuitry may monitor for error events in a signal that has passed through the inverters from any one of the first, second, or third output nodes, and may generate first and second monitoring circuitry outputs. The circuit may further include an error correction circuit that produces an error correction output based on the first and second monitoring circuitry outputs. Accordingly, the monitoring circuitry may generate first and second updated monitoring circuitry outputs based on the error correction output. The first and second updated monitoring circuitry outputs may be logically combined using a logic circuit to reset the signal that has passed through the loop.

A circuit may include a ring oscillator circuit and monitoring circuitry. The ring oscillator circuit has a group of inverters in a loop, whereby the group of inverters includes first, second, and third output nodes. The monitoring circuitry may monitor for error events in a signal that has passed through the inverters from any one of the first, second, or third output nodes, and may generate first and second monitoring circuitry outputs. The circuit may further include an error correction circuit that produces an error correction output based on the first and second monitoring circuitry outputs. Accordingly, the monitoring circuitry may generate first and second updated monitoring circuitry outputs based on the error correction output. The first and second updated monitoring circuitry outputs may be logically combined using a logic circuit to reset the signal that has passed through the loop.

Systems and methods for reducing jitter due to power supply noise in an integrated circuit by drawing additional current. The additional current causes the total current to generally have a frequency higher than a resonant frequency of the integrated circuit and/or a power distribution network of the integrated circuit. A power distribution network may supply power to components of an integrated circuit, and data driver circuitry may draw first current to drive a serial data signal generated from a parallel data signal. Compensation circuitry may receive the parallel data signal and draw second current at times when the compensation circuitry determines data driver circuitry is not drawing the first current based on the parallel data signal, thereby causing a net of the first and second current to be higher than a resonant frequency range of the integrated circuit device and/or a component of the integrated circuit device.

A comparator circuit includes a comparator, a first selection circuit, and a switched-capacitor circuit. The comparator has a first terminal, a second terminal, and an output terminal. The comparator is configured to generate an output signal at the output terminal based on a first signal on the first terminal and a second signal on the second terminal. The first selection circuit is coupled with the first terminal of the comparator and configured to selectively set a first input signal or a first calibration signal as the first signal in response to a control signal. The switched-capacitor circuit is coupled with the output terminal and the second terminal of the comparator. The switched-capacitor circuit is configured to adjust and output the second signal based on the output signal.

A comparator circuit includes a comparator, a first selection circuit, and a switched-capacitor circuit. The comparator has a first terminal, a second terminal, and an output terminal. The comparator is configured to generate an output signal at the output terminal based on a first signal on the first terminal and a second signal on the second terminal. The first selection circuit is coupled with the first terminal of the comparator and configured to selectively set a first input signal or a first calibration signal as the first signal in response to a control signal. The switched-capacitor circuit is coupled with the output terminal and the second terminal of the comparator. The switched-capacitor circuit is configured to adjust and output the second signal based on the output signal.

A voltage controlled oscillator is provided. The voltage controlled oscillator includes a current controlled oscillator, a voltage to current conversion circuit and a noise cancellation circuit. The current controlled oscillator is configured to receive a bias current and generate an oscillating signal with an oscillating frequency according to the bias current. The voltage to current conversion circuit is coupled to a power supply voltage and configured to generate a supply current according to an input voltage. The noise cancellation circuit is configured to receive a bias voltage and the supply current from the voltage to current conversion circuit, and configured to generate a noise cancellation current in response to power supply voltage variation and cancel the noise cancellation current from the supply current to generate the bias current. The bias voltage of the noise cancellation circuit is coupled to an internal voltage of the voltage to current conversion circuit.