A sub-microsecond pulsed electric field generator is disclosed. The field generator includes a controller, which generates a power supply control signal and generates a pulse generator control signal, and a power supply, which receives the power supply control signal and generates one or more power voltages based on the received power supply control signal. The field generator also includes a pulse generator which receives the power voltages and the pulse generator control signal, and generates one or more pulses based on the power voltages and based on the pulse generator control signal. In some embodiments, the controller receives feedback signals representing a value of a characteristic of or a result of the pulses and generates at least one of the power supply control signal and the pulse generator control signal based on the received feedback signals.

A sub-microsecond pulsed electric field generator is disclosed. The field generator includes a controller, which generates a power supply control signal and generates a pulse generator control signal, and a power supply, which receives the power supply control signal and generates one or more power voltages based on the received power supply control signal. The field generator also includes a pulse generator which receives the power voltages and the pulse generator control signal, and generates one or more pulses based on the power voltages and based on the pulse generator control signal. In some embodiments, the controller receives feedback signals representing a value of a characteristic of or a result of the pulses and generates at least one of the power supply control signal and the pulse generator control signal based on the received feedback signals.

A method for achieving a first uniformity level in a processing rate across a surface of a substrate is described. The method includes receiving the first uniformity level to be achieved across the surface of the substrate and identifying a first plurality of duty cycles associated with a first plurality of states based on the first uniformity level. The first plurality of states are of a variable of a first radio frequency (RF) signal. The method further includes controlling an RF generator to generate the first RF signal having the first plurality of duty cycles.

A method for achieving a first uniformity level in a processing rate across a surface of a substrate is described. The method includes receiving the first uniformity level to be achieved across the surface of the substrate and identifying a first plurality of duty cycles associated with a first plurality of states based on the first uniformity level. The first plurality of states are of a variable of a first radio frequency (RF) signal. The method further includes controlling an RF generator to generate the first RF signal having the first plurality of duty cycles.

An event detection controller for a circuit system controlled by a pulse wave modulation signal, can perform a specific event handling when a specific event is detected, wherein the specific event handling includes stopping a pulse wave modulation device, starting up the stopped pulse wave modulation device, controlling the pulse wave modulation device to change the pulse wave modulation signal, outputting a wake-up signal to wake up the circuit system, controlling the pulse detector to change its detection configuration, changing a cumulative occurrences number of the specific pattern of an event discrimination module, outputting a control signal or a first data signal to a peripheral device through a bus connected to an event response module and/or requesting the peripheral device to send a second data signal through the bus.

An event detection controller for a circuit system controlled by a pulse wave modulation signal, can perform a specific event handling when a specific event is detected, wherein the specific event handling includes stopping a pulse wave modulation device, starting up the stopped pulse wave modulation device, controlling the pulse wave modulation device to change the pulse wave modulation signal, outputting a wake-up signal to wake up the circuit system, controlling the pulse detector to change its detection configuration, changing a cumulative occurrences number of the specific pattern of an event discrimination module, outputting a control signal or a first data signal to a peripheral device through a bus connected to an event response module and/or requesting the peripheral device to send a second data signal through the bus.

Systems and methods are disclosed for differential clock duty cycle correction. For example, a method includes converting an input rail-to-rail differential clock signal to a low-swing differential signal; fixing a DC bias level of the low-swing differential signal; changing DC bias levels of ends of the low-swing differential signal in a complementary manner to change cross-over points of the low-swing differential signal; and inputting the low-swing differential signal to a level shifter and buffer to generate a duty-corrected rail-to-rail digital differential clock signal. For example, an apparatus may include a differential pair of CMOS transmission-gate switches as clock input switches; complementary differential pairs of transistors with gate terminals connected to a differential control voltage signal; and/or extra current sources for independently controlling the DC bias voltages of ends of a differential clock signal.

Systems and methods are disclosed for differential clock duty cycle correction. For example, a method includes converting an input rail-to-rail differential clock signal to a low-swing differential signal; fixing a DC bias level of the low-swing differential signal; changing DC bias levels of ends of the low-swing differential signal in a complementary manner to change cross-over points of the low-swing differential signal; and inputting the low-swing differential signal to a level shifter and buffer to generate a duty-corrected rail-to-rail digital differential clock signal. For example, an apparatus may include a differential pair of CMOS transmission-gate switches as clock input switches; complementary differential pairs of transistors with gate terminals connected to a differential control voltage signal; and/or extra current sources for independently controlling the DC bias voltages of ends of a differential clock signal.

Methods and apparatuses for regulating a power converter are described. A device comprising a control circuit and a logic circuit can be integrated in a controller coupled to the power converter. The control circuit can generate a constant off-time signal based on a ramp signal and an error signal. The logic circuit can generate a control signal based on the constant off-time signal and a constant on-time signal. The logic circuit can output the control signal to the power converter. In response to an on-time period of the constant off-time signal being less than an on-time period of the constant on-time signal, the control signal can vary according to the constant on-time signal. In response to the on-time period of the constant off-time signal being greater than the on-time period of the constant on-time signal, the control signal can vary according to the constant off-time signal.

Methods and apparatuses for regulating a power converter are described. A device comprising a control circuit and a logic circuit can be integrated in a controller coupled to the power converter. The control circuit can generate a constant off-time signal based on a ramp signal and an error signal. The logic circuit can generate a control signal based on the constant off-time signal and a constant on-time signal. The logic circuit can output the control signal to the power converter. In response to an on-time period of the constant off-time signal being less than an on-time period of the constant on-time signal, the control signal can vary according to the constant on-time signal. In response to the on-time period of the constant off-time signal being greater than the on-time period of the constant on-time signal, the control signal can vary according to the constant off-time signal.