H03K3/313

ON-CHIP RANDOMNESS GENERATION
20170141771 · 2017-05-18 ·

An on-chip true noise generator including an embedded noise source with a low-voltage, high-noise zener diode(s), and an in-situ close-loop zener diode power control circuit. The present invention proposes the use of heavily doped polysilicon and silicon p-n diode(s) structures to minimize the breakdown voltage, increasing noise level and improving reliability. The present invention also proposes an in-situ close-loop zener diode control circuit to safe-guard the zener diode from catastrophic burn-out.

COMBO CIRCUIT WITH ELECTROSTATIC DISCHARGE PROTECTION

A combo circuit with electrostatic discharge protection includes a pulse width modulation integrated circuit and a power integrated circuit. The pulse width modulation integrated circuit has an electrostatic discharge protection circuit and the electrostatic discharge protection circuit is installed between a source of the power integrated circuit and a reference ground potential of the combo circuit.

COMBO CIRCUIT WITH ELECTROSTATIC DISCHARGE PROTECTION

A combo circuit with electrostatic discharge protection includes a pulse width modulation integrated circuit and a power integrated circuit. The pulse width modulation integrated circuit has an electrostatic discharge protection circuit and the electrostatic discharge protection circuit is installed between a source of the power integrated circuit and a reference ground potential of the combo circuit.

INPUT CIRCUIT AND SEMICONDUCTOR DEVICE
20250300638 · 2025-09-25 ·

According to one embodiment, an input circuit is provided that inputs a voltage to each of drive terminals of a pair of differential transistors constituting a differential pair. The input circuit includes: a first input wiring section to which a first voltage is applied; a second input wiring section to which a second voltage; a first output wiring section to which a voltage is output to one of the pair of differential transistors; a second output wiring section to which a voltage is output to the other of the pair of differential transistors; a voltage generation circuit section that generates a third voltage based on at least one of the first voltage and the second voltage; a first transistor disposed between the first input wiring section and the first output wiring section; and a second transistor disposed between the second input wiring section and the second output wiring section.

INPUT CIRCUIT AND SEMICONDUCTOR DEVICE
20250300638 · 2025-09-25 ·

According to one embodiment, an input circuit is provided that inputs a voltage to each of drive terminals of a pair of differential transistors constituting a differential pair. The input circuit includes: a first input wiring section to which a first voltage is applied; a second input wiring section to which a second voltage; a first output wiring section to which a voltage is output to one of the pair of differential transistors; a second output wiring section to which a voltage is output to the other of the pair of differential transistors; a voltage generation circuit section that generates a third voltage based on at least one of the first voltage and the second voltage; a first transistor disposed between the first input wiring section and the first output wiring section; and a second transistor disposed between the second input wiring section and the second output wiring section.

Combo circuit with electrostatic discharge protection

A combo circuit with electrostatic discharge protection includes a pulse width modulation integrated circuit and a power integrated circuit. The pulse width modulation integrated circuit has an electrostatic discharge protection circuit and the electrostatic discharge protection circuit is installed between a source of the power integrated circuit and a reference ground potential of the combo circuit.

Combo circuit with electrostatic discharge protection

A combo circuit with electrostatic discharge protection includes a pulse width modulation integrated circuit and a power integrated circuit. The pulse width modulation integrated circuit has an electrostatic discharge protection circuit and the electrostatic discharge protection circuit is installed between a source of the power integrated circuit and a reference ground potential of the combo circuit.

Input circuit and semiconductor device

According to one embodiment, an input circuit is provided that inputs a voltage to each of drive terminals of a pair of differential transistors constituting a differential pair. The input circuit includes: a first input wiring section to which a first voltage is applied; a second input wiring section to which a second voltage; a first output wiring section to which a voltage is output to one of the pair of differential transistors; a second output wiring section to which a voltage is output to the other of the pair of differential transistors; a voltage generation circuit section that generates a third voltage based on at least one of the first voltage and the second voltage; a first transistor disposed between the first input wiring section and the first output wiring section; and a second transistor disposed between the second input wiring section and the second output wiring section.

Input circuit and semiconductor device

According to one embodiment, an input circuit is provided that inputs a voltage to each of drive terminals of a pair of differential transistors constituting a differential pair. The input circuit includes: a first input wiring section to which a first voltage is applied; a second input wiring section to which a second voltage; a first output wiring section to which a voltage is output to one of the pair of differential transistors; a second output wiring section to which a voltage is output to the other of the pair of differential transistors; a voltage generation circuit section that generates a third voltage based on at least one of the first voltage and the second voltage; a first transistor disposed between the first input wiring section and the first output wiring section; and a second transistor disposed between the second input wiring section and the second output wiring section.