The disclosure discloses a flat panel display device and a scan driving circuit thereof. The scan driving circuit includes a plurality of cascaded scan drivers, each of the scan drivers includes a forward/backward scanning circuit, an output circuit, a pull-down circuit and a pull-down control circuit, the forward/backward scanning circuit is configured to control the scan drivers to scan forward or backward, the output circuit outputs a first scanning signal, a second scanning signal and a third scanning signal. The first scanning signal, the second scanning signal and the third scanning signal are output by sharing the forward/backward scanning circuit, the pull-down circuit and the pull-down control circuit according to the disclosure, which can reduce the amount of thin film transistors of the scan driving circuit and spare space that are further beneficial for narrow frame design.

The disclosure discloses a flat panel display device and a scan driving circuit thereof. The scan driving circuit includes a plurality of cascaded scan drivers, each of the scan drivers includes a forward/backward scanning circuit, an output circuit, a pull-down circuit and a pull-down control circuit, the forward/backward scanning circuit is configured to control the scan drivers to scan forward or backward, the output circuit outputs a first scanning signal, a second scanning signal and a third scanning signal. The first scanning signal, the second scanning signal and the third scanning signal are output by sharing the forward/backward scanning circuit, the pull-down circuit and the pull-down control circuit according to the disclosure, which can reduce the amount of thin film transistors of the scan driving circuit and spare space that are further beneficial for narrow frame design.

Method and apparatus to produce a step function with a designed transition (rise and/or fall) time on the order of <10 ns that reaches steady state by implementing a system that sums a number of currents at different rise times (frequencies) to generate the step function. The system also includes a passive output filter, composed of low resistance, inductance and very low capacitance to mitigate overshoot and high frequency noise.

Methods for controlling a ramp rate of an output voltage derived from one or more charge pumps and reducing variation in the ramp rate due to process, voltage, and temperature (PVT) variations are described. In some embodiments, the ramp rate of the output voltage from one or more charge pumps may be controlled using a ramp rate control circuit that uses a digital counter to adjust (or step up) the output voltage from the one or more charge pumps based on a ramp rate schedule. The ramp rate schedule may specify varying output voltage levels for the one or more charge pumps during a time period in which the output voltage charges up from a first voltage to a second voltage greater than the first voltage.

A pulse generator and a method of fabricating a pulse generator are described. The pulse generator includes an input node to receive an input voltage, a first capacitor, and a second capacitor. The first capacitor is positioned between the input node and the second capacitor. An output node outputs an output voltage with a pulse shape, and the pulse generator also includes at least one switch between the input node and the second capacitor. The at least one switch controls the pulse shape of the output voltage.

A pulse generator and a method of fabricating a pulse generator are described. The pulse generator includes an input node to receive an input voltage, a first capacitor, and a second capacitor. The first capacitor is positioned between the input node and the second capacitor. An output node outputs an output voltage with a pulse shape, and the pulse generator also includes at least one switch between the input node and the second capacitor. The at least one switch controls the pulse shape of the output voltage.

Methods and devices for performing ablation. In some examples an ablation delivery system is configured to allow separate voltage levels of a capacitor stack to be accessed for use in therapy delivery. Ablation therapy systems switchable between current and voltage controlled output are described. Methods of treating a patient using adjustable interphase or interpulse delay are disclosed as well.

A circuit includes a first capacitance array formed by n nominally equal capacitive elements. A first electrode of each capacitive element is coupled, via respective switches to either a reference voltage or ground. A differential amplifier has a first input coupled to an output of a first capacitance array, a second input grounded, and an output generating a voltage ramp. A capacitive feedback circuit couples the output of the differential amplifier to the first input. A second capacitance array has an output coupled to the first input of the differential amplifier. The capacitive elements of the first capacitance array are organized in sets. The circuit operates by controllably coupling, set by set, second electrodes of the capacitive elements of the first capacitance array to the first input of the differential amplifier.