A “frequency shifter” is a clock synthesis system, that includes either a multiplexer or a multi-modulus divider (MMD), a fractional frequency divider, a tunable delay element, a sawtooth signal generator, in addition to other synchronization and control circuits. The generated sawtooth signal is used to control the delay of the tunable delay element, which in turn is used to adjust the phase of the signal generated by either M-to-1 multiplexer or the MMD, reducing its timing errors, and improving the spectral purity of the generated clock signal.

A “frequency shifter” is a clock synthesis system, that includes either a multiplexer or a multi-modulus divider (MMD), a fractional frequency divider, a tunable delay element, a sawtooth signal generator, in addition to other synchronization and control circuits. The generated sawtooth signal is used to control the delay of the tunable delay element, which in turn is used to adjust the phase of the signal generated by either M-to-1 multiplexer or the MMD, reducing its timing errors, and improving the spectral purity of the generated clock signal.

A fluctuating oscillator includes: an adder that has an input terminal to which an input signal including a main signal and an uncorrelated signal that is uncorrelated with the main signal and is higher in frequency than the main signal is input, and adds a feedback signal to the input signal; a threshold discrimination unit that generates a pulse signal by comparing an addition signal added by the adder with a threshold; a transient response unit that generates an output signal by transiently responding the generated pulse signal; and a feedback loop that feeds back the output signal to the adder as the feedback signal.

A fluctuating oscillator includes: an adder that has an input terminal to which an input signal including a main signal and an uncorrelated signal that is uncorrelated with the main signal and is higher in frequency than the main signal is input, and adds a feedback signal to the input signal; a threshold discrimination unit that generates a pulse signal by comparing an addition signal added by the adder with a threshold; a transient response unit that generates an output signal by transiently responding the generated pulse signal; and a feedback loop that feeds back the output signal to the adder as the feedback signal.

An energy harvester is provided. The energy harvester includes a current-voltage converter, a voltage-PWM converter, an analog multiplier, a sample-hold circuit, an α-generator, and a fractional open-circuit voltage circuit.

According to an aspect, a controller includes an error circuit configured to receive a clamping voltage and a feedback signal, the error circuit configured to generate a regulation reference signal based on the clamping voltage and the feedback signal, a PWM circuit configured to receive the regulation reference signal and a current sense signal, the PWM circuit configured to generate a limit signal or a regulation signal based on the regulation reference signal and the current sense signal, a clamp circuit configured to increase a magnitude of the clamping voltage in response to the regulation signal being an active state and decrease the magnitude of the clamping voltage in response to the limit signal being the active state, and a drive circuit configured to generate a drive signal for regulating the output current in response to at least one of the limit signal or the regulation signal.

According to an aspect, a controller includes an error circuit configured to receive a clamping voltage and a feedback signal, the error circuit configured to generate a regulation reference signal based on the clamping voltage and the feedback signal, a PWM circuit configured to receive the regulation reference signal and a current sense signal, the PWM circuit configured to generate a limit signal or a regulation signal based on the regulation reference signal and the current sense signal, a clamp circuit configured to increase a magnitude of the clamping voltage in response to the regulation signal being an active state and decrease the magnitude of the clamping voltage in response to the limit signal being the active state, and a drive circuit configured to generate a drive signal for regulating the output current in response to at least one of the limit signal or the regulation signal.

A system comprises a first comparator, a second comparator, a pulse-width modulation (PWM) controller, and a ramp generator. The first comparator has a positive input coupled to a first ramp output of the ramp generator and a negative input configured to receive an input voltage. The second comparator has a positive input configured to receive the input voltage and a negative input coupled to a second ramp output of the ramp generator. The PWM controller is coupled to outputs and control signal inputs of the first and second comparators and has a control output. In some implementations, the ramp generator generates a high-side falling ramp for the first comparator and a low-side rising ramp for the second comparator. In some implementations, the ramp generator includes a first ramp generator for the high-side falling ramp and a second ramp for the low-side rising ramp.

A system comprises a first comparator, a second comparator, a pulse-width modulation (PWM) controller, and a ramp generator. The first comparator has a positive input coupled to a first ramp output of the ramp generator and a negative input configured to receive an input voltage. The second comparator has a positive input configured to receive the input voltage and a negative input coupled to a second ramp output of the ramp generator. The PWM controller is coupled to outputs and control signal inputs of the first and second comparators and has a control output. In some implementations, the ramp generator generates a high-side falling ramp for the first comparator and a low-side rising ramp for the second comparator. In some implementations, the ramp generator includes a first ramp generator for the high-side falling ramp and a second ramp for the low-side rising ramp.

A multiphase power supply includes a multiphase converter including first and second converters having differing operating phases, each of the first and second converters configured to convert input power into driving power, and transmit the driving power to a power amplifier, a detector configured to detect a voltage based on the driving power, and a duty controller configured to compare an error voltage between an envelope signal of an input signal input into the power amplifier and the detected voltage and sawtooth wave signals having different phases from each other to generate duty control signals, wherein the duty controller compares the error voltage and the sawtooth wave signals with each other using a single comparator.