An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.

An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.

An apparatus comprising an encoder is configured to: detect a first edge in the input signal and, in response, provide a pulse generation sequence comprising the encoder being configured to: generate, in the output signal, a first pulse, wherein the first pulse is provided over first and second minimum time periods irrespective of an edge subsequent the first edge being present in the input signal; and obtain a first sample of the input signal; and obtain a second sample at an end of the first pulse; and if the first sample and the second sample are indicative of different voltage levels, generate a second pulse; or if the first and second sample and the same maintain the voltage level in the output signal.

Non-ideal diodes have a non-zero resistance across a PN junction when the junction is forward biased. When a diode comprising a power supply has a voltage drop across the junction that exceeds a predetermined threshold, the threshold-exceeding voltage drop trips a comparator, the output of which controls a switch between a power supply and a load.

Non-ideal diodes have a non-zero resistance across a PN junction when the junction is forward biased. When a diode comprising a power supply has a voltage drop across the junction that exceeds a predetermined threshold, the threshold-exceeding voltage drop trips a comparator, the output of which controls a switch between a power supply and a load.

Exemplary embodiments may disclose a flip-flop circuit for inserting a zero-delay bypass mux including a master circuit which is configured to receive a data input, an input clock signal, and a bypass signal, and output an intermediate signal to a first node; and a slave circuit which is configured to receive the intermediate signal at the first node, the input clock signal, and the bypass signal, and output an output clock signal. The bypass signal controls the slave circuit to output one of a buffered input clock signal and a stretched clock signal as the output clock signal based on a logic level of the bypass signal.

Exemplary embodiments may disclose a flip-flop circuit for inserting a zero-delay bypass mux including a master circuit which is configured to receive a data input, an input clock signal, and a bypass signal, and output an intermediate signal to a first node; and a slave circuit which is configured to receive the intermediate signal at the first node, the input clock signal, and the bypass signal, and output an output clock signal. The bypass signal controls the slave circuit to output one of a buffered input clock signal and a stretched clock signal as the output clock signal based on a logic level of the bypass signal.

A liquid discharge apparatus includes: an modulation circuit that generates a modulated signal by pulse-modulating a source signal through self-oscillation; a transistor that amplifies the modulated signal to generate an amplified modulated signal; a low-pass filter that includes an inductor and a capacitor and smoothes the amplified modulated signal to generate a drive signal; a feedback circuit that allows the drive signal to return to the modulation circuit; a piezoelectric element that is displaced by application of the drive signal thereto; a cavity that is filled with a liquid inside and has an internal volume which changes when the piezoelectric element is displaced; and a nozzle that is provided to discharge the liquid inside the cavity in response to the change of the internal volume of the cavity. In this configuration, a self-resonant frequency of the capacitor is higher than a frequency of the self-oscillation.

A liquid discharge apparatus includes: an modulation circuit that generates a modulated signal by pulse-modulating a source signal through self-oscillation; a transistor that amplifies the modulated signal to generate an amplified modulated signal; a low-pass filter that includes an inductor and a capacitor and smoothes the amplified modulated signal to generate a drive signal; a feedback circuit that allows the drive signal to return to the modulation circuit; a piezoelectric element that is displaced by application of the drive signal thereto; a cavity that is filled with a liquid inside and has an internal volume which changes when the piezoelectric element is displaced; and a nozzle that is provided to discharge the liquid inside the cavity in response to the change of the internal volume of the cavity. In this configuration, a self-resonant frequency of the capacitor is higher than a frequency of the self-oscillation.

A circuit and method for digital controlling the slew rate of load voltage are provided. The circuit is comprised of a digital slew-rate control unit that utilizes a feedback signal to generate control signals where the feedback signal indicates the observed rate of voltage change on the load. The circuit is further comprised of a load driver circuit that is operated by the control signals and provides a slew-rate controlled output voltage used to operate a load switch, where the load switch provides power to the load. The circuit is configured to operate the load switch using a slew-rate controlling driver, depending on the state of the load switch transition, and a non-controlling driver.