Patent classifications
H03K5/12
Quadrature error correction circuit and semiconductor memory device including the same
A quadrature error correction circuit includes a duty cycle adjusting circuit, a phase interpolator, a phase detector, and a delay control circuit. The duty cycle adjusting circuit generates a first corrected clock signal and a second corrected clock signal whose skew and duty cycle error are concurrently adjusted by adjusting a delay of edges of a second clock signal and adjusting a delay of a falling edge of a first clock signal based on first through fourth control code sets. The phase interpolator generates a second delayed and selected clock signal by delaying a second selected clock signal selected from first through fourth adjusted clock signals. A phase detector detects a phase difference between a first selected clock signal and the second delayed and selected clock signal to generate an up/down signal. The delay control circuit generates the first through fourth control code sets based on the up/down signal.
Local oscillator divider with reduced applied current variation
Aspects of the disclosure relate to a local oscillator frequency divider for a receiver or transmitter. In this regard a frequency divider has a first frequency input coupled to a first oscillator frequency output, a second frequency input coupled to a complementary second oscillator frequency output, a first in-phase/quadrature (I/Q) divided frequency output, and a complementary second I/Q divided frequency output. The frequency divider further has a first alternating current (AC) coupling capacitor between the first frequency input and the first oscillator frequency output and a second AC coupling capacitor between the second frequency input and the second oscillator frequency output.
DYNAMIC SLEW RATE CONTROLLER
A voltage pulse generator comprising: circuitry controllable to generate a voltage pulse at an output of the circuitry; and an interruptor that monitors voltage at the output during a transition edge of the voltage pulse and interrupts a voltage change associated with the transition edge if the monitored voltage differs from a predetermined reference voltage by a predetermined amount.
DYNAMIC SLEW RATE CONTROLLER
A voltage pulse generator comprising: circuitry controllable to generate a voltage pulse at an output of the circuitry; and an interruptor that monitors voltage at the output during a transition edge of the voltage pulse and interrupts a voltage change associated with the transition edge if the monitored voltage differs from a predetermined reference voltage by a predetermined amount.
AN ELECTRICAL PULSE GENERATING DEVICE
An electrical pulse generating device is disclosed which comprises a switching unit configured such that the electrical conductivity of a current path through the switching unit is controllable by transmission of a modulated digital drive signal to the switching unit, whereby the switching unit is controllably switchable between different operational states thereof based on the digital drive signal. A shape of the electrical pulse created by the discharge of the electrical energy storage module is at least in part governed by the modulation of the digital drive signal. The modulated digital drive signal is generated based on a selected electrical pulse shape.
SLEW-RATE COMPENSATED TRANSISTOR TURNOFF SYSTEM
In a transistor turnoff system, a transistor control circuit is configured to adjust a control voltage at a transistor control output responsive to a comparison signal at a control input. The control voltage has a slew rate. A comparator has a comparator output and first and second comparator inputs. The first comparator input is coupled to the transistor control output. The comparator is configured to: provide the comparison signal at the comparator output based on a reference voltage at the second comparator input; and deactivate the transistor control circuit by changing a state of the comparison signal responsive to the control voltage falling below the reference voltage. A slew-rate compensator is configured to increase the reference voltage by a compensation voltage that compensates for a time delay of the comparator or the transistor control circuit. The compensation voltage is proportional to the slew rate.
Dynamic slew rate controller
A voltage pulse generator comprising: circuitry controllable to generate a voltage pulse at an output of the circuitry; and an interruptor that monitors voltage at the output during a transition edge of the voltage pulse and interrupts a voltage change associated with the transition edge if the monitored voltage differs from a predetermined reference voltage by a predetermined amount.
Dynamic slew rate controller
A voltage pulse generator comprising: circuitry controllable to generate a voltage pulse at an output of the circuitry; and an interruptor that monitors voltage at the output during a transition edge of the voltage pulse and interrupts a voltage change associated with the transition edge if the monitored voltage differs from a predetermined reference voltage by a predetermined amount.
Area efficient slew-rate controlled driver
According to certain aspects, a driver includes an output transistor coupled between a first rail and an output of the driver, a first current source coupled to a gate of the output transistor, a second current source, and a switch, wherein the switch and the second current source are coupled in series between the gate of the output transistor and a second rail. The driver also includes a current sensor configured to generate a sense current based on an output current of the driver, and a reference current source configured to generate a reference current, wherein the current sensor and the reference current source are coupled to a control input of the switch.
Area efficient slew-rate controlled driver
According to certain aspects, a driver includes an output transistor coupled between a first rail and an output of the driver, a first current source coupled to a gate of the output transistor, a second current source, and a switch, wherein the switch and the second current source are coupled in series between the gate of the output transistor and a second rail. The driver also includes a current sensor configured to generate a sense current based on an output current of the driver, and a reference current source configured to generate a reference current, wherein the current sensor and the reference current source are coupled to a control input of the switch.