A peak-detector circuit may include a first input terminal for providing a first input voltage, a first rectifying element with an anode connected to the first input terminal, a first capacitor with a first electrode connected to a cathode of the first rectifying element, a first terminal coupled to the first electrode of the first capacitor, a second rectifying element with a cathode connected to the first input terminal, a second capacitor, a first switch coupling an anode of the second rectifying element to a first electrode of the second capacitor, and a second terminal coupled to the first electrode of the second capacitor.

A peak-detector circuit may include a first input terminal for providing a first input voltage, a first rectifying element with an anode connected to the first input terminal, a first capacitor with a first electrode connected to a cathode of the first rectifying element, a first terminal coupled to the first electrode of the first capacitor, a second rectifying element with a cathode connected to the first input terminal, a second capacitor, a first switch coupling an anode of the second rectifying element to a first electrode of the second capacitor, and a second terminal coupled to the first electrode of the second capacitor.

A peak/bottom detection circuit is disclosed. A comparator compares a voltage of one of three or more capacitors with an input voltage. A calculation amplifier amplifies the voltage of one of the three or more capacitors. Each of three or more switches respectively corresponding to the three or more capacitors connects a corresponding capacitor among the three or more capacitors to one of the comparator, the calculation amplifier, and a source of the input voltage. A controller generates control signals for sequentially switching connection destinations of the three or more capacitors and to supply the control signals to the three or more switches, respectively, in which the connection destinations of three capacitors among the three or more capacitors are different from each other.

A single configuration terminal of a device is used to configure multiple operating parameters of the device based on a resistor and a capacitor selectively connected to the configuration terminal. The device includes a detection circuit configured to monitor a voltage signal at the configuration terminal to determine multiple values in response to a regulated current source providing a current to the configuration terminal selectively connected to the resistor and the capacitor in parallel, and configure multiple operating parameters based on the determined values. A method for configuring operating parameters using a single configuration terminal of a device includes providing a current to the configuration terminal selectively connected to a resistor and a capacitor in parallel, monitoring a voltage signal at the configuration terminal, determining multiple values based on the monitoring, and configuring multiple operating parameter based on the determined values.

A single configuration terminal of a device is used to configure multiple operating parameters of the device based on a resistor and a capacitor selectively connected to the configuration terminal. The device includes a detection circuit configured to monitor a voltage signal at the configuration terminal to determine multiple values in response to a regulated current source providing a current to the configuration terminal selectively connected to the resistor and the capacitor in parallel, and configure multiple operating parameters based on the determined values. A method for configuring operating parameters using a single configuration terminal of a device includes providing a current to the configuration terminal selectively connected to a resistor and a capacitor in parallel, monitoring a voltage signal at the configuration terminal, determining multiple values based on the monitoring, and configuring multiple operating parameter based on the determined values.

A multi-sense circuit includes a transistor circuit having sense nodes and a gate node, a peak detector having inputs coupled to the sense nodes of the transistor circuit and an output, and a control circuit having a gate control node coupled to the gate node of the transistor circuit and an overcurrent protection node coupled to the output of the peak detector.

A multi-sense circuit includes a transistor circuit having sense nodes and a gate node, a peak detector having inputs coupled to the sense nodes of the transistor circuit and an output, and a control circuit having a gate control node coupled to the gate node of the transistor circuit and an overcurrent protection node coupled to the output of the peak detector.

A power converter which converts electrical power at an input voltage into electrical power at an output voltage is presented. It has a power stage with a high side switching element, a low side switching element and an inductor. The power converter has a voltage-to-current converter coupled to the power stage to convert a a-voltage indicative of a a-current flowing into the inductor into an indicator current. A peak current detector receives the indicator current at an input node, to determine a pedestal component of the indicator current in a first time interval during which the high side switching element is open, and to generate a calibrated indicator current by subtracting the pedestal component from the indicator current. The peak current detector compares the calibrated indicator current with a threshold value for detecting a more precise peak current flowing into the inductor, taking into account the effects of temperature or circuit aging.

A power converter which converts electrical power at an input voltage into electrical power at an output voltage is presented. It has a power stage with a high side switching element, a low side switching element and an inductor. The power converter has a voltage-to-current converter coupled to the power stage to convert a a-voltage indicative of a a-current flowing into the inductor into an indicator current. A peak current detector receives the indicator current at an input node, to determine a pedestal component of the indicator current in a first time interval during which the high side switching element is open, and to generate a calibrated indicator current by subtracting the pedestal component from the indicator current. The peak current detector compares the calibrated indicator current with a threshold value for detecting a more precise peak current flowing into the inductor, taking into account the effects of temperature or circuit aging.

An electronic circuit includes a peak detector, a gain controller, and a compressor. The peak detector detects a peak level from a digital input. The gain controller outputs a digital gain with regard to increasing the peak level to a target level, The compressor provides the gain controller with a compressed gain which is to be output as the digital gain, based on the detected peak level. In a compression interval where the peak level is greater than a threshold level, the output digital gain increases as the peak level decreases. The compressor generates the compressed gain such that a ratio of an increment of the output digital gain to a decrement of the peak level in the compression interval is less than a reference ratio.