The transition to a horizontal integrated circuit (IC) design flow has raised concerns regarding the security and protection of IC intellectual property (IP). Obfuscation of an IC has been explored as a potential methodology to protect IP in both the digital and analog domains in isolation. However, novel methods are required for analog mixed-signal circuits that both enhance the current disjoint implementations of analog and digital security measures and prevent an independent adversarial attack of each domain. A methodology generates functional and behavioral dependencies between the analog and digital domains that results in an increase in the adversarial key search space. The dependencies between the analog and digital keys result in a 3× increase in the number of iterations required to complete the SAT attack.

A circuit to modulate the power supply to track input or output voltages provided to or output by a plurality of amplifiers to reduce power dissipation is provided. The circuit may include a peak detection circuit configured to receive a plurality of voltages respectively corresponding to the plurality of amplifiers, and to detect and output information regarding a maximum instantaneous voltage from the received plurality of voltages, and a summing circuit configured to output a sum of the information regarding the maximum instantaneous voltage and an amplifier headroom voltage. A reference voltage may be provided for the supply voltage responsive to the output sum. The circuit may also include a scaling circuit configured to scale the output sum, and the reference voltage may be a scaled reference voltage output by the scaling circuit.

A circuit to modulate the power supply to track input or output voltages provided to or output by a plurality of amplifiers to reduce power dissipation is provided. The circuit may include a peak detection circuit configured to receive a plurality of voltages respectively corresponding to the plurality of amplifiers, and to detect and output information regarding a maximum instantaneous voltage from the received plurality of voltages, and a summing circuit configured to output a sum of the information regarding the maximum instantaneous voltage and an amplifier headroom voltage. A reference voltage may be provided for the supply voltage responsive to the output sum. The circuit may also include a scaling circuit configured to scale the output sum, and the reference voltage may be a scaled reference voltage output by the scaling circuit.

In certain embodiments, a system for detecting a peak laser pulse includes a laser, a photodiode configured to detect pulses emitted by the laser, and circuitry for detecting a peak pulse timing of the laser. The circuitry is configured to receive a periodic series of voltage signals based on laser pulses detected by the photodiode, stretch the voltage signals, and obtain sampled voltages from the stretched voltage signals using periodic control signals. The circuitry is further configured to shift the timing of the periodic control signals, compare the sampled voltages for respective timings of the control signals, and select an optimal control signal timing based on the comparison.

In certain embodiments, a system for detecting a peak laser pulse includes a laser, a photodiode configured to detect pulses emitted by the laser, and circuitry for detecting a peak pulse timing of the laser. The circuitry is configured to receive a periodic series of voltage signals based on laser pulses detected by the photodiode, stretch the voltage signals, and obtain sampled voltages from the stretched voltage signals using periodic control signals. The circuitry is further configured to shift the timing of the periodic control signals, compare the sampled voltages for respective timings of the control signals, and select an optimal control signal timing based on the comparison.

A circuit includes a peak detector, a diode, a dynamic clamp circuit, and an offset correction circuit. The peak detector generates a voltage on the peak detector output proportional to a lowest voltage on the peak defector input. The anode of the diode is coupled to the peak detector input. The dynamic clamp circuit is coupled to the peak detector input and is configured to clamp a voltage on the peak detector input responsive to a voltage on the diode's anode being greater than the lowest voltage on the peak detector's input. The offset correction circuit is coupled to the peak detector output and is configured to generate an output signal whose amplitude is offset from an amplitude of the peak detector output.

A circuit includes a peak detector, a diode, a dynamic clamp circuit, and an offset correction circuit. The peak detector generates a voltage on the peak detector output proportional to a lowest voltage on the peak defector input. The anode of the diode is coupled to the peak detector input. The dynamic clamp circuit is coupled to the peak detector input and is configured to clamp a voltage on the peak detector input responsive to a voltage on the diode's anode being greater than the lowest voltage on the peak detector's input. The offset correction circuit is coupled to the peak detector output and is configured to generate an output signal whose amplitude is offset from an amplitude of the peak detector output.

The invention relates to a pulse shaper (18). The pulse shaper (18) comprises an integrator (19) for generating a pulse having a peak amplitude indicative of the energy of a detected photon, a feedback resistor (22), switchable discharge circuitry (23) for discharging the integrator (19), and a peak detector (24) for detecting the peak of the pulse. The pulse shaper is adapted to start the discharge of the integrator by the switchable discharge circuitry based on the detection of the peak and to connect the feedback resistor in parallel to the integrator during a period of the pulse generation and to disconnect the feedback resistor during another period of the pulse generation. The pulse shaper can be such that the generation of the pulse is substantially unhindered by any noticeable concurrent discharging mechanism while, at the same time, the occurrence of energy pedestals can be efficiently avoided.

The invention relates to a pulse shaper (18). The pulse shaper (18) comprises an integrator (19) for generating a pulse having a peak amplitude indicative of the energy of a detected photon, a feedback resistor (22), switchable discharge circuitry (23) for discharging the integrator (19), and a peak detector (24) for detecting the peak of the pulse. The pulse shaper is adapted to start the discharge of the integrator by the switchable discharge circuitry based on the detection of the peak and to connect the feedback resistor in parallel to the integrator during a period of the pulse generation and to disconnect the feedback resistor during another period of the pulse generation. The pulse shaper can be such that the generation of the pulse is substantially unhindered by any noticeable concurrent discharging mechanism while, at the same time, the occurrence of energy pedestals can be efficiently avoided.

A circuit includes a peak detector, a diode, a dynamic clamp circuit, and an offset correction circuit. The peak detector generates a voltage on the peak detector output proportional to a lowest voltage on the peak defector input. The anode of the diode is coupled to the peak detector input. The dynamic clamp circuit is coupled to the peak detector input and is configured to clamp a voltage on the peak detector input responsive to a voltage on the diode's anode being greater than the lowest voltage on the peak detector's input. The offset correction circuit is coupled to the peak detector output and is configured to generate an output signal whose amplitude is offset from an amplitude of the peak detector output.