A zero-crossing detection circuit includes a logic unit and an input stop detection unit. The logic unit is configured to estimate a zero cross of an AC signal in accordance with at least one of a first monitoring target signal and a second monitoring target signal, respectively input through diodes from a first node and a second node between which the AC signal is applied, so as to generate a zero-crossing detection signal. The input stop detection unit is configured to compare the first monitoring target signal with the second monitoring target signal after giving an offset to one of them so as to generate an input stop detection signal. The logic unit is configured to fix a logic level of the zero-crossing detection signal in accordance with the input stop detection signal.

A zero-crossing detection circuit includes a logic unit and an input stop detection unit. The logic unit is configured to estimate a zero cross of an AC signal in accordance with at least one of a first monitoring target signal and a second monitoring target signal, respectively input through diodes from a first node and a second node between which the AC signal is applied, so as to generate a zero-crossing detection signal. The input stop detection unit is configured to compare the first monitoring target signal with the second monitoring target signal after giving an offset to one of them so as to generate an input stop detection signal. The logic unit is configured to fix a logic level of the zero-crossing detection signal in accordance with the input stop detection signal.

A circuit arrangement for monitoring an alternating voltage signal includes a comparator configured to receive the alternating voltage signal or a signal obtained from the alternating voltage signal at a first comparator input and output a comparator signal at a comparator output. The circuit arrangement further includes a zero crossing detector configured to receive a reference signal or a signal obtained from the reference signal at a monitoring input and generate a detector signal at an output of the zero crossing detector. The circuit arrangement further includes a logic circuit including a first timing element connected downstream of the zero crossing detector for generating a first clock signal and a second timing element connected downstream of the zero crossing detector for generating a second clock signal.

A circuit arrangement for monitoring an alternating voltage signal includes a comparator configured to receive the alternating voltage signal or a signal obtained from the alternating voltage signal at a first comparator input and output a comparator signal at a comparator output. The circuit arrangement further includes a zero crossing detector configured to receive a reference signal or a signal obtained from the reference signal at a monitoring input and generate a detector signal at an output of the zero crossing detector. The circuit arrangement further includes a logic circuit including a first timing element connected downstream of the zero crossing detector for generating a first clock signal and a second timing element connected downstream of the zero crossing detector for generating a second clock signal.

A spread spectrum clock generation device that may reduce electromagnetic interference (EMI) includes: a first comparator configured to compare an input signal with a first reference voltage and output a first comparison signal; a second comparator configured to compare the input signal with a second reference voltage and output a second comparison signal; a latch configured to receive the first and second comparison signals as inputs and output an output signal; and a delaying circuit configured to generate the input signal by delaying the output signal to have a different delay time for each time interval.

A spread spectrum clock generation device that may reduce electromagnetic interference (EMI) includes: a first comparator configured to compare an input signal with a first reference voltage and output a first comparison signal; a second comparator configured to compare the input signal with a second reference voltage and output a second comparison signal; a latch configured to receive the first and second comparison signals as inputs and output an output signal; and a delaying circuit configured to generate the input signal by delaying the output signal to have a different delay time for each time interval.

Disclosed are an electromagnetic heating device and a heating control circuit thereof, and a low power heating control method. The heating control circuit comprises: a voltage zero-crossing detection unit for detecting a voltage zero-crossing signal of an alternating current power source; a resonance heating unit; a rectification and filtering unit; a power switch tube; a drive unit, connected to a drive end of the power switch tube to drive the power switch tube to be turned on and off; a drive voltage transformation unit, connected to the drive end of the power switch tube to change a drive voltage of the power switch tube; and a main control unit for controlling the power switch tube to operate under the drive of a first drive voltage according to the voltage zero-crossing signal, thereby reducing the damage risk of the power switch tube and reducing turn-on noises.

Disclosed are an electromagnetic heating device and a heating control circuit thereof, and a low power heating control method. The heating control circuit comprises: a voltage zero-crossing detection unit for detecting a voltage zero-crossing signal of an alternating current power source; a resonance heating unit; a rectification and filtering unit; a power switch tube; a drive unit, connected to a drive end of the power switch tube to drive the power switch tube to be turned on and off; a drive voltage transformation unit, connected to the drive end of the power switch tube to change a drive voltage of the power switch tube; and a main control unit for controlling the power switch tube to operate under the drive of a first drive voltage according to the voltage zero-crossing signal, thereby reducing the damage risk of the power switch tube and reducing turn-on noises.

A symmetry control circuit for a trailing edge phase control dimmer circuit for controlling alternating current (AC) power to a load, the symmetry control circuit including: a bias signal generator circuit configured to monitor non-conduction periods of each half cycle of said AC power for an elapsed duration of the non-conduction periods, and generate a bias signal voltage based on the elapsed duration, whereby an amplitude of the bias signal voltage is proportional to the elapsed duration of the non-conduction periods; and a bias signal converter circuit configured to convert the bias signal voltage to a bias signal current, wherein the bias signal current is added to a reference current of a conduction period timing circuit configured to determine said conduction periods, and wherein the conduction period timing circuit is configured to alter one of the conduction periods immediately following one of the non-conduction periods based on the bias signal current when added to the reference current to compensate for a phase shift of a zero-crossing of said one of the non-conduction periods corresponding to an elapsed duration of said one of the non-conduction periods so as to restore symmetry of the non-conduction periods of each half cycle of AC power.

The power supply apparatus includes a control unit configured to determine a stand-by time period from making a connection of a switch unit to subjecting a second voltage conversion unit to activation according to an input voltage of the alternating current power supply detected by a voltage detection unit.