H03K17/005

CLOCK SWITCHING DEVICE
20230421144 · 2023-12-28 · ·

Provided is a clock switching device including a first latch circuit, a second latch circuit, and a switching circuit. The first latch circuit latches a first selection signal based on triggering of a first clock signal. The second latch circuit latches a second selection signal based on triggering of a second clock signal. A reset terminal of the second latch circuit is coupled to the first latch circuit. The second latch circuit is selectively reset based on an output of the first latch circuit. The switching circuit is coupled to an output terminal of the first latch circuit and an output terminal of the second latch circuit. The switching circuit selects one of the clock signals as an output clock signal of the clock switching device based on the selection signals.

Circuit for controlling voltage for driving liquid lens and camera module and optical device comprising same
10908384 · 2021-02-02 · ·

The present invention provides a circuit for controlling a voltage for driving a liquid lens including a first voltage generator for outputting a first voltage; a second voltage generator for outputting a second voltage having an opposite polarity to the first voltage; a first switch for selecting one of the first voltage and a ground voltage, and transmitting the selected voltage; a second switch for selecting one of the second voltage and the ground voltage, and transmitting the selected voltage; and a third switch for selecting one of a voltage selected by the first switch and the voltage selected by the second switch, and transmitting the selected voltage, wherein the third switch is plural in number, and the first switch is connected in common to the plurality of third switches.

Apparatus, systems and methods for identifying products

Apparatus, systems and methods for identifying products are described herein.

POWER SUPPLY CELL AND POWER SUPPLY SYSTEM USING THE SAME
20210211050 · 2021-07-08 ·

An objective of the present application is to to provide a power supply cell of a power supply system and a power supply system using the same. The power supply cell includes a first power conversion circuit operative to output a first DC voltage across its first output positive terminal and first output negative terminal, a second power conversion circuit operative to output a second DC voltage across its second output positive terminal and second output negative terminal, a first controllable unidirectional semiconductor switch operative to generate a first conduction path from the first output positive terminal of the first power conversion circuit to the second output negative terminal of the second power conversion circuit, a first unidirectional semiconductor switch operative to generate a second conduction path from the first output positive terminal of the first power conversion circuit to the second output positive terminal of the second power conversion circuit, a second unidirectional semiconductor switch operative to generate a third conduction path from the first output negative terminal of the first power conversion circuit to the second output negative terminal of the second power conversion circuit, a first low-pass filter and a controlling unit operative to issue turn-on signal or turn-off signal to the first controllable unidirectional semiconductor switch so that the first power conversion circuit and the second power conversion circuit supply current to the low-pass filter via the first conduction path or both of the second conduction path and the third conduction path. The first low-pass filter can help smooth the power supply cell's output voltage and current in order to achieve a relatively wide linearly constant output power range. By controlling the ration of series and parallel connection in a switching cycle of the switching frequency by the switching arrangement, both the output voltage and current range of the power supply cell can be enlarged smoothly and linearly with the help of the first low-pass filter.

Input buffer
11863165 · 2024-01-02 · ·

The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

AMPLIFICATION CIRCUIT WITH ANALOG MULTIPLEXER
20210013876 · 2021-01-14 ·

First switches are respectively connected between multiple input terminals and an inverting input of an operational amplifier. Second switches and feedback resistors are respectively sequentially series-connected between an output of the operational amplifier and nodes between the multiple input terminals and the first switches. Third switches are respectively connected between nodes between the second switches and the feedback resistors and an output terminal of an amplification circuit with an analog multiplexer.

RADIO-FREQUENCY SWITCHES AND RELATED CIRCUITS
20200395936 · 2020-12-17 ·

Radio-frequency switches and related circuits are disclosed. In some embodiments, a switching device can include a series arm having transistors implemented in a stack configuration between first and second nodes. The switching device can further include a shunt arm having transistors implemented in a stack configuration between the first node and a ground node. The switching device can further include a bias architecture having a series arm bias circuit and a shunt arm bias circuit. The series arm bias circuit can be configured to bias the transistors of the series arm and include a gate-gate resistor that couples each pair of neighboring transistors. The shunt arm bias circuit can be configured to bias the transistors of the shunt arm and include a gate-gate resistor that couples each pair of neighboring transistors.

BATTERY LIFE TIME BASED ON SENSOR DATA

The invention relates to a system for controlling supply of a device (104). The device can be a power retention device that requires to be permanently powered. To this end, it can be alternatively powered by a power supply (140), in a first mode, or by a battery (102), in a second mode. At least one sensor (110-114; 105) of the system acquires data related to the battery, such as environmental data, the voltage of the battery or the discharge current of the battery. Based on the data and at least one characteristic curve of the battery, a battery monitoring module is configured to switch between the first and second modes to improve the lifetime of the battery.

INPUT BUFFER
20200358434 · 2020-11-12 · ·

The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

LOSS OF SIGNAL DETECTION CIRCUIT
20200350899 · 2020-11-05 ·

Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first inverter coupled between first and second nodes, a second inverter coupled between third and fourth nodes, and a first logic circuit having a first input coupled to the second node, a second input coupled to the fourth node, and an output, a first positive feedback circuit coupled between the first and third nodes and having a control input. The first positive feedback circuit comprises a first switch coupled between the first and fifth nodes and having a control input, a second switch coupled between the third and sixth nodes and having a control input, a third inverter having an input coupled to the sixth node and an output coupled to the fifth node, and a fourth inverter having an input coupled to the fifth node and an output coupled to the sixth node.