A transmission interface module includes a receiving unit, a transmitting unit, a multiplexer, and a processing unit. An output terminal and a control terminal of the receiving unit are electrically connected to the processing unit. The input terminal and the control terminal of the transmitting unit are electrically connected to the processing unit, and the control terminal of the multiplexer is electrically connected to the processing unit. The transmission interface module respectively adjusts a turn-on state or a turn-off state of the analog power terminal, the digital power terminal, the processing unit, the receiving unit, the transmitting unit, and the multiplexer through a plurality of operation modes to transmit the detecting signals.

A nanosecond pulser is disclosed. In some embodiments, the nanosecond pulser may include one or more switch circuits including one or more solid state switches, a transformer, and an output. In some embodiments, the transformer may include a first transformer core, a first primary winding wound at least partially around a portion of the first transformer core, and a secondary winding wound at least partially around a portion of the first transformer core. In some embodiments, each of the one or more switch circuits are coupled with at least a portion of the first primary winding. In some embodiments, the output may be electrically coupled with the secondary winding and outputs electrical pulses having a peak voltage greater than about 1 kilovolt and a rise time of less than 150 nanoseconds or less than 50 nanoseconds.

A transmission interface module includes a receiving unit, a transmitting unit, a multiplexer, and a processing unit. An output terminal and a control terminal of the receiving unit are electrically connected to the processing unit. The input terminal and the control terminal of the transmitting unit are electrically connected to the processing unit, and the control terminal of the multiplexer is electrically connected to the processing unit. The transmission interface module respectively adjusts a turn-on state or a turn-off state of the analog power terminal, the digital power terminal, the processing unit, the receiving unit, the transmitting unit, and the multiplexer through a plurality of operation modes to transmit the detecting signals.

In order to provide a power supply switch circuit using only low-breakdown voltage transistors and eliminate the need for a special through-current preventing circuit, the switch control circuits output a signal ranging from a ground voltage level to a second power supply voltage level when a first power supply voltage (0 V/3.3 V) is in off-state and a second power supply voltage (0 V/1.8 V) is in on-state, and a signal ranging from the second power supply voltage level to a first power supply voltage level when the first and second power supply voltages are in on-state, thereby allowing a PMOS transistor and an NMOS transistor to turn on or off.

A power transmission circuit includes a first transmission transistor, a second transmission transistor, and a first control circuit. A first terminal of the first transmission transistor is used as a power input terminal of the power transmission circuit. A second terminal of the first transmission transistor is coupled to a first node. A control terminal of the first transmission transistor is coupled to a control node. A first terminal of the second transmission transistor is used as a power output terminal of the power transmission circuit. A second terminal of the second transmission transistor is coupled to the first node. When a voltage of the power output terminal is greater than or equal to a voltage of the power input terminal, the first control circuit outputs a first voltage to the control node, to turn off the first transmission transistor and the second transmission transistor.

The disclosure provides a light emitting diode including a light emitting diode (LED), a first transistor, a second transistor and capacitor. A cathode terminal of the LED is configured to receive a first power supply voltage. A first port of the capacitor coupled to the gate of the first transistor is configured to store a data signal in a first duration. A first port of the second transistor is configured to receive a second power supply voltage. A gate of the second transistor is configured to receive a PWM signal in a second duration. A second port of the second transistor is coupled to the second port of the first transistor. The second transistor is turned on for a conducting time in the second duration according to the PWM signal, and the first transistor provides, in the conducting time, a drive current to the LED according to the data signal.

Method of reducing simultaneous switching output (SSO) impact in a system through the use of signal integrity/power integrity (SI/PI) simulations for each channel in the system includes calculating a worst case scenario current for a channel of the system, and calculating a worst case channel skew for a channel of the system. Based on the worst case scenario current and the worst case channel skew, a switching current is determined for the system.

Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first inverter coupled between first and second nodes, a second inverter coupled between third and fourth nodes, and a first logic circuit having a first input coupled to the second node, a second input coupled to the fourth node, and an output, a first positive feedback circuit coupled between the first and third nodes and having a control input. The first positive feedback circuit comprises a first switch coupled between the first and fifth nodes and having a control input, a second switch coupled between the third and sixth nodes and having a control input, a third inverter having an input coupled to the sixth node and an output coupled to the fifth node, and a fourth inverter having an input coupled to the fifth node and an output coupled to the sixth node.

A multiway switch, a radio frequency system, and a wireless communication device are provided. The multiway switch includes five throw (T) ports and four pole (P) ports. The five T ports include one first T port coupled with all of the four P ports. The multiway switch is configured to be coupled with a radio frequency circuit and an antenna system of an electronic device operable in a dual-frequency single-transmit mode, to enable a preset function of the electronic device, the antenna system includes four antennas corresponding to the four P ports, and the preset function is a function of transmitting a sounding reference signal (SRS) through the four antennas in turn.

An electronic device includes a multiplexer (MUX), a switching array and logic circuitry. The MUX includes multiple input ports and an output port, and is configured to receive, via the input ports, multiple input signals, and to output, via the output port, a selected signal among the input signals. The switching array is coupled to the input ports of the MUX and is configured to receive the input signals and to connect or disconnect between each input signal and a respective input port. The logic circuitry is electrically coupled to the switching array and to the MUX, and is configured to control the switching array to connect at least the selected signal that the MUX is outputting, and to disconnect all the input signals other than the at least selected signal.