A bidirectional switch fault protection circuit includes a bidirectional switch circuit, a desaturation detection circuit, and a gate driver. The bidirectional switch circuit generates first and second switch voltages based on a direction of electric current. The desaturation detection circuit outputs the first switch voltage in response to the electric current flowing in a first direction and outputs the second switch voltage in response to the electric current flowing in a second direction opposite the first direction. The gate driver receives the first switch voltage in response to the electric current flowing in the first direction and the second switch voltage in response to the electric current flowing in the second direction. The gate driver detects a first short circuit condition based on the first switch voltage and a second short circuit condition based on the second switch voltage.

The present disclosure discloses a composite switching circuit, including a plurality of first semiconductor devices connected in series; and at least one second semiconductor device each connected in parallel to one of the plurality of first semiconductor devices. The composite switching circuit is connected to an input source. The second semiconductor device is turned off during a preset period to transfer a current flowing through the second semiconductor device to the first semiconductor devices connected in parallel to the second semiconductor device.

A semiconductor device includes a first switch and a first driver. The first switch selects and outputs one of a power supply potential and a generated potential as a first switch output potential based on a synchronization signal from a transmission circuit and a delayed signal delayed from the synchronization signal. The first driver charges a gate of a bipolar transistor element based on the synchronization signal of the transmission circuit and the first switch output potential.

In certain aspects, a receiving circuit includes a splitter, a first receiver, a second receiver, and a boost circuit. The splitter is configured to receive an input signal, split the input signal into a first signal and a second signal, output the first signal to the first receiver, and output the second signal to the second receiver. In certain aspects, the voltage swing of the input signal is split between the first signal and the second signal. The boost circuit may be configured to shift a supply voltage of the second receiver to boost a gate-overdrive voltage of a transistor in the second receiver during a transition of the input signal (e.g., transition from low to high). In certain aspects, the boost circuit controls the gate-overdrive voltage boosting based on the first signal and the second signal.

A circuit comprises an optical coupling including an illuminator optically coupled to an optical sensor to output a voltage from the optical sensor based on intensity of illumination from the illuminator. The circuit includes a voltage input node with a resistance connected in series between the voltage input and a Zener diode. A method includes powering an illuminator with current from a first voltage input node. The method includes sensing illumination level in illumination from the illuminator with a sensor and outputting output proportionate to illumination sensed by the sensor indicative of voltage detected at the voltage input node. The method can include limiting current between the voltage input node and the illuminator.

In a semiconductor switch, a resistance value between a current input terminal to which a current is input and a current output terminal from which a current is output decreases as a voltage of a control terminal based on a potential of the current output terminal increases. A booster circuit is disposed on a path extending from the current input terminal to the control terminal. The booster circuit boosts a voltage input from the current input terminal side and applies the boosted voltage to the control terminal. A switch is connected between the control terminal and the current output terminal of the semiconductor switch. The switch is switched off by power consumption. The power consumption stops and the switch switches on if the supply of power to the booster circuit stops.

In a voltage converter, a blocking transistor has a conduction path between a power terminal and a converter terminal. A body diode of the blocking transistor: conducts current from the power terminal to the converter terminal; and blocks current from the converter terminal to the power terminal. A first switching transistor has a conduction path between the converter terminal and a switching terminal. A second switching transistor has a conduction path between the switching terminal and a ground terminal. A first gate driver has an output coupled to a control terminal of the first switching transistor. A second gate driver has an output coupled to a control terminal of the second switching transistor. A driver circuit has an output coupled to a control terminal of the blocking transistor. A bootstrap terminal of the driver circuit is coupled to a bias input of the first gate driver.

Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.

A power stage includes a power transistor controlled via a driver, the power transistor comprising three terminals, including a collector c, an emitter e and a gate g linked to the driver, the power stage comprising a detection device for detecting a short-circuit current cc between the collector c and the emitter e, the detection device comprising a voltage sensor capable of detecting a voltage Vge at the gate g of the power transistor outside of a predefined voltage range.

A power module includes: a GaN transistor, an NMOS transistor, a first capacitor, a first diode and a second diode. The NMOS transistor is electrically connected to the GaN transistor. A negative electrode of the first capacitor is electrically connected to an anode of the first diode and a gate of the GaN transistor. A cathode of the second diode is electrically connected to a gate of the NMOS transistor. The power module further includes a power module control terminal electrically connected to an anode of the first capacitor and an anode of the second diode.