A joint control method with variable ZVS angles for dynamic efficiency optimization in a WPC system for EVs under ZVS conditions, including: adjusting a phase-shift duty cycle of a secondary active rectifier to control a charging voltage and a charging current of EV's batteries through a charging voltage closed loop and a charging current closed loop, respectively; adjusting a power angle of the secondary active rectifier to control a ZVS angle of the secondary active rectifier through a secondary ZVS angle closed loop; adjusting a phase-shift duty cycle of a primary inverter to control a ZVS angle of the primary inverter through the primary ZVS angle closed loop; determining the current operating case of the WPC system and adjusting the ZVS angles of the primary inverter and the secondary active rectifier to automatically identify an optimal operating point with a maximum charging efficiency through the P&O method.

A fully isolated drive circuit to be used for regulating an output voltage across a load. The isolated drive circuit may charge, discharge, or preserve the load charge using a controller that controls one or more switches. The controller may operate a switch according to an internal/external clock or an external control signal received by the controller. The isolated drive circuit may be an effective solution to simplify the drive design and decrease the amount of energy dissipated by the drive, especially when the load, associated with the drive, requires a high input voltage level.

A compact solid state relay (7) is provided. Solid state devices (74, 75), such as Triacs or Thyristors are used to implement the relay functionality. The device is at least partially enclosed in a housing that has pins for mounting on an electronics board. A number of “U” shaped jumpers (72) or other jumpers or wires are provided in the housing to act as heat sinks. A sub-miniature fan (70) is positioned to create an air flow over the heat sinks and dissipate heat from the device.

The present disclosure concerns a method and a circuit for controlling first and second switches electrically in series, wherein one or a plurality of crossings of a voltage threshold by a voltage across the first switch cause a conductive state of the second switch.

Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.

A relay circuit, including a solid state relay switch, connected to a first relay line and to a charging capacitor, and connected to a second relay line. The relay circuit may also include a solid state relay control circuit, coupled between the charging capacitor and the solid state relay switch. The solid state relay control circuit may include a voltage detection circuit, having an input coupled to an output of the charging capacitor, and having an output arranged to generate a LOW voltage signal when a voltage level of the charging capacitor is below a low threshold value. The solid state relay control circuit may also include a zero crossing circuit, coupled to the first relay line and the second relay line, and having an output to generate a clock signal when a zero crossing event takes place between the first relay line and the second relay line.

A color temperature switching scheme for an LED lighting device is disclosed. The color temperature switching scheme comprises a plurality of different color temperature performances correspondingly generated by a plurality of different paired combinations of a first electric power allocated to a first LED load emitting a light with a first color temperature and a second electric power allocated to a second LED load emitting a light with a second color temperature such that a mingled color temperature between the first color temperature and the second color temperature can be generated thru a light diffuser. For tuning the mingled color temperature of the LED lighting device a reverse yet complementary power adjustment process for distributing a total electric power T between the first LED circuit and the second LED circuit is required such that a total light intensity remains unchanged while the mingled color temperature is being adjusted.

A color temperature switching scheme for an LED lighting device is disclosed. The color temperature switching scheme comprises a plurality of different color temperature performances correspondingly generated by a plurality of different paired combinations of a first electric power allocated to a first LED load emitting a light with a first color temperature and a second electric power allocated to a second LED load emitting a light with a second color temperature such that a mingled color temperature between the first color temperature and the second color temperature can be generated thru a light diffuser. For tuning the mingled color temperature of the LED lighting device a reverse yet complementary power adjustment process for distributing a total electric power T between the first LED circuit and the second LED circuit is required such that a total light intensity remains unchanged while the mingled color temperature is being adjusted.

Systems, methods, techniques and apparatuses of power switches are disclosed. One exemplary embodiment is a power switch comprising a first semiconductor device and a second semiconductor device coupled together in a first anti-series configuration between a first terminal and a second terminal; a third semiconductor device and a fourth semiconductor device coupled together in a second anti-series configuration between the first terminal and the second terminal; a controller configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device, and to conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.

Example MOSFET circuits include a first metal-oxide-semiconductor field-effect transistor (MOSFET) having a gate, a source and a drain, and a second MOSFET coupled in series with the first MOSFET. The second MOSFET has a gate, a source and a drain. The MOSFET circuit also includes a controller configured to supply a same control signal to the gate of the first MOSFET and the gate of the second MOSFET to turn on or turn off the first MOSFET and the second MOSFET when a drain-source voltage of the first MOSFET and a drain-source voltage of the second MOSFET are substantially zero. Other MOSFET circuits and methods of operating MOSFET circuits are also disclosed.