A power supply modulator includes: a first switching element in which a first voltage is applied to the first terminal and the second terminal is connected to an output terminal; a second switching element in which the third terminal is connected to the output terminal and the second terminal, and a second voltage is applied to the fourth terminal; a first driver circuit in which the first voltage is applied to the fifth terminal and the sixth terminal is grounded, to control opening and closing of the first switching element by a change in a resistance value between the fifth and sixth terminals; and a second driver circuit in which the seventh terminal is grounded and the second voltage is applied to the eighth terminal, to control opening and closing of the second switching element by a change in a resistance value between the seventh and eighth terminals.

A semiconductor device includes a first transistor that flows a current to a load, a current generation circuit that outputs a current corresponding to a power consumption of the first transistor, a temperature sensor, a resistor-capacitor network coupled between the current generation circuit and the temperature sensor and an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor network, wherein the resistor-capacitor network comprises a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance between the first transistor and the temperature sensor.

Methods and devices used to cancel non-linear capacitances in high power radio frequency (RF) switches manufactured in bulk complementary metal-oxide-semiconductor (CMOS) processes are disclosed. The methods and devices are also applicable to stacked switches and RF switches fabricated in silicon-on-insulator (SOI) technology.

An electronic device includes a driving control signal generation circuit configured to generate first and second driving control signals and a driving switching control signal. The electronic device also includes a switching control signal driving circuit configured to drive a switching control signal to a first voltage on the basis of the first driving control signal and the driving switching control signal or drive the switching control signal to a second voltage on the basis of the second driving control signal, depending on whether a power-down mode is performed.

A switch device includes an output transistor, an overcurrent protection circuit configured to be capable of performing an overcurrent protection operation in which magnitude of target current flowing in the output transistor is limited to a predetermined upper limit current value or less, and a control circuit configured to be capable of controlling a state of the output transistor and capable of changing the upper limit current value among a plurality of current values including a predetermined first current value and a predetermined second current value less than the first current value. The control circuit can limit the magnitude of the target current to the first current value or less in response to the magnitude of the target current reaching the first current value, and then change the upper limit current value to the second current value.

Provided is a gate controller having a primary signal input which is AC coupled to the gate through a capacitor, one or more bias inputs each connected to the gate through a resistor such as to control the DC voltage bias of the gate and therefore the conductivity of the switching element. The bias inputs can be properly connected to internal nodes of the charge pump, or charge pump stages, such that the gate controller is self-biased, without using bias-reference external to the charge pump. The gate controller can be made programmable by using potentiometers in place of the bias resistors. The programmable gate controller stages can be connected to form a programmable gate controlled charge pump

A method determines a current flowing through at least one switching element of an electrical circuit arrangement. When the switching element is turned on the current flows through a switchable portion of the switching element. The switching element is associated with a temperature sensor and a voltage sensor. The temperature sensor measures a temperature of the switching element and the voltage sensor measures a voltage drop across the switchable portion of the switching element. The temperature sensor and the voltage sensor are connected to a computing device. The computing device determines a current value of the current based on the measured temperature and the measured voltage drop.

According to one embodiment, a deterioration checking apparatus includes an inductor that is connected in series to a main current path of a MOS transistor to be checked, and forms a closed loop together with the MOS transistor when the MOS transistor is in an ON-state, a control circuit that controls ON/OFF of the MOS transistor, a current sensor that detects a current released from the inductor, and a calculation circuit that calculates an ON-resistance of the MOS transistor from an attenuation characteristic of a current released from the inductor when the MOS transistor is in an ON-state, and calculates a threshold voltage of the MOS transistor from an attenuation characteristic of a current released from the inductor when the MOS transistor is in an OFF-state. Therefore, it is possible to easily check a deterioration state of the MOS transistor.

A system includes an output terminal and a linear switch circuit coupled to the output terminal. The linear switch circuit includes a first power field-effect transistor (FET) having: a first channel width; a control terminal; a first current terminal; and a second current terminal, wherein the second current terminal is coupled to the output terminal. The linear switch circuit also includes a second power FET having: a second channel width smaller than the first channel width; a control terminal; a first current terminal coupled to the first current terminal of the first power FET; and a second current terminal coupled to the output terminal. The system also comprises a control circuit coupled to the control terminal of the first power FET and to the control terminal of the second power FET. The control circuit detects a drain-to-source voltage (V.sub.DS) saturation condition and controls the first and second power FETs accordingly.

A method for active gate driving a switching circuit, wherein: a characteristic of a waveform controlled by the switching circuit is represented by a function mapping an input variable to an output metric, and wherein: the input variable comprises: a design variable having a first set of possible values; and an environmental variable having a second set of possible values, wherein the environmental variable is observable but not controllable. The method comprising: performing Bayesian optimisation on the function to generate a model of the function, wherein a next value of the design variable for evaluating the function is selected based on values of an acquisition function associated with a predicted value of the environmental variable; determining a first value of the design variable that optimises the model of the function; and controlling the switching circuit according to the first value of the design variable.