A resistor network with reduced area and/or improved voltage resolution and methods of designing and operating the same are provided. Generally, the resistor network includes a resistor ladder with a first number (n) of integrated resistors coupled in series between a top and a bottom contact, with one or more contacts coupled between adjacent resistors. A second number of integrated resistors is coupled in parallel between the top and bottom contacts, and a third number of integrated resistors is coupled in series between the second integrated resistors and either the top or the bottom contact. Each of the integrated resistors has a resistance of R, and a voltage developed across each resistor in the resistor ladder is equal to a voltage applied between the top and bottom contacts divided by n. Where the second number is n1, and the third number is 1, the total number of resistors is 2n.

A control circuit configured to supply a control voltage to a control terminal (G) of a solid state solid state switching device of a solid state power controller. The control circuit comprises: a primary controller operative to supply a primary control voltage to the control terminal (G) of the solid state switching device; and an auxiliary circuit configured to supply an auxiliary control voltage to the control terminal (G) of the solid state switching device in case the primary controller falls into an inoperative condition.

Passive Ethernet by-pass switches, methods of using the same, and systems including the passive Ethernet by-pass switches include a first connection configured to be coupled to a first Ethernet port, a second connection configured to be coupled to a second Ethernet port, and switching circuitry including at least one internal switch operable to allow network communication between the first connection, the second connection, and at least one Ethernet controller, the at least one internal switch including a depletion mode transistor operable to bridge the first connection to the second connection to establish communication between the first connection and the second connection.

A switch device includes a phase change switch and a memory for storing a target state of the phase change switch. A controller determines a phase state of the phase change switch, and, if the state of the phase change switch does not correspond to the target state, controls a heater of the phase change switch to change the state of the phase changes switch to the target state.

A non-volatile 1-bit state storage including a first signal converter for converting a digital input signal into an analog intermediate signal and a second signal converter for converting the analog intermediate signal into a digital output signal. The first signal converter is provided with a non-volatile memory so that after an outage of a power supply voltage, the previously output analogue intermediate signal is restored. A bistable solid-state relay that assumes a bistable switching state by means of the non-volatile 1-bit state storage and restores this state after an outage of the power supply voltage.

A relay including an interface circuit, a magnetic core, and an output transistor. The interface circuit includes a plurality of input terminals, a voltage supply terminal, and at least one output terminal. The magnetic core is connected to the interface circuit and configured to form at least one bit of non-volatile core memory. The output transistor includes a plurality of conduction terminals and a control terminal. The control terminal is connected to the output terminal of the interface circuit.

An integrated circuit and an operation method thereof are provided. The integrated circuit includes a voltage detecting unit, a central processing unit, a memory unit and a control unit. The voltage detecting unit detects a system voltage and correspondingly outputs a voltage state signal. The central processing unit has at least one register. When the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the control unit stores values of the registers into the memory unit.

An integrated circuit and an operation method thereof are provided. The integrated circuit includes a voltage detecting unit, a central processing unit, a memory unit and a control unit. The voltage detecting unit detects a system voltage and correspondingly outputs a voltage state signal. The central processing unit has at least one register. When the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the control unit stores values of the registers into the memory unit.

A circuit is suggested comprising an electronic switching element, a logic unit coupled to control the electronic switching element, and a counter unit coupled to the logic unit, wherein the counter unit comprises a counter and an internal power supply.

A circuit is suggested comprising an electronic switching element, a logic unit coupled to control the electronic switching element, and a counter unit coupled to the logic unit, wherein the counter unit comprises a counter and an internal power supply.