A selection circuit architecture makes it possible to perform upward and/or downward transitions in sets of sequences of slow and fast phases so as at the same time to solve the problems of inductive switching noise and the problems of currents in the supply rails. This solution has multiple advantages linked to the ease of implementation and flexibility of configurations that are possible for adapting to the specific constraints when designing the circuit.

In a power feeding control device, N-channel first FET and second FET are located in a current path for current flowing from a positive terminal to a negative terminal. The drain of the first FET is located downstream of the source. The drain of the second FET is located upstream of the source. The cathode of a first diode is connected to the negative terminal. A first drive circuit and a second drive circuit switch ON or OFF the first FET and the second FET by adjusting the gates of the first FET and the second FET, with respect to the cathode of the first diode.

A method for driving an electronic switch in a power converter and a power converter are disclosed. The method includes: driving an electronic switch (1) coupled to an inductor (2) in the power converter, wherein driving the electronic switch (1) includes driving the electronic switch (1) in a plurality of drive cycles by a drive signal (S.sub.DRV), Driving the electronic switch (1) in at least one of the plurality of drive cycles includes: determining a desired duration (T.sub.ON_DES) of a current (I.sub.1) through the switch (1); and adjusting a duration (T.sub.DRV) of an on-level of the drive signal (S.sub.DRV) dependent on the desired duration (T.sub.ON_DES) and a delay time (T.sub.DEL) obtained in a preceding drive cycle. The delay time (T.sub.DEL) is a time duration, in the preceding drive cycle, between a first time instance (t1) when the drive signal (S.sub.DRV) changes from the on-level to an off-level and a second time instance (t2) when a current through the electronic switch (1) falls below a predefined threshold.

A drive device for driving a voltage-controlled semiconductor element. The drive device includes: a drive circuit connected to the gate of the semiconductor element via a gate resistor; a delay circuit connected to the drive circuit, for delaying a drive signal output from the drive circuit until a gate voltage of the semiconductor element enters a Miller effect period, which is a period during which the gate voltage transitionally changes, the gate voltage having temperature dependency on a chip temperature of the semiconductor element; a one-shot circuit connected to the delay circuit, for outputting a pulse signal with a pulse width shorter than the Miller effect period; a comparator that compares the gate voltage with a reference voltage; and an AND circuit that outputs an overheat detection signal in response to the gate voltage exceeding the reference voltage.

A drive device for driving a voltage-controlled semiconductor element. The drive device includes: a drive circuit connected to the gate of the semiconductor element via a gate resistor; a delay circuit connected to the drive circuit, for delaying a drive signal output from the drive circuit until a gate voltage of the semiconductor element enters a Miller effect period, which is a period during which the gate voltage transitionally changes, the gate voltage having temperature dependency on a chip temperature of the semiconductor element; a one-shot circuit connected to the delay circuit, for outputting a pulse signal with a pulse width shorter than the Miller effect period; a comparator that compares the gate voltage with a reference voltage; and an AND circuit that outputs an overheat detection signal in response to the gate voltage exceeding the reference voltage.

A method for protecting a system including a driver integrated circuit includes receiving a driver input signal. The method includes driving an output signal externally to the driver integrated circuit. The output signal is driven based on the driver input signal and an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node coupled to a terminal of the driver integrated circuit.

A method for protecting a system including a driver integrated circuit includes receiving a driver input signal. The method includes driving an output signal externally to the driver integrated circuit. The output signal is driven based on the driver input signal and an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node coupled to a terminal of the driver integrated circuit.

The present disclosure provides a start-up initialization circuit of motor drive system, including a power amplitude detecting and internal power supply module, a controlled delay module, a waveform shaping module and a power supply judging and adjusting module integrated on a same substrate, configured to detect and manage a voltage change of each node of a drive system in real time to cause a motor drive system to realize a start-up initialization process transit from an off state to a normal working state. The present disclosure finally forms the start-up initialization circuit of motor drive system by integrating the power amplitude detecting and internal power supply module, the controlled delay module, the waveform shaping module and the power supply judging and adjusting module and integrating on a single chip, which greatly ensures the reliability of power on and start-up of the motor drive system.

The present description concerns a method of controlling at least one switch (TH), including: the reception of signals (S3-i) having between one another at least one phase shift representative of a desired state of said at least one switch; the obtaining, from said signals, of a value (Si) representative of the desired state; and the application of the representative value to said at least one switch.

The present description concerns a method of controlling at least one switch (TH), including: the reception of signals (S3-i) having between one another at least one phase shift representative of a desired state of said at least one switch; the obtaining, from said signals, of a value (Si) representative of the desired state; and the application of the representative value to said at least one switch.