A bridge rectifier and associated control circuitry collectively form a “regtifier” which rectifies an input time varying voltage and regulates the rectified output voltage produced without the use of a traditional voltage regulator. To accomplish this, the gate voltages of transistors of the bridge rectifier that are on during a given phase may be modulated via analog control (to increase the on-resistance of those transistors) or via pulse width modulation (to turn off those transistors prior to the end of the phase). The transistors of the bridge rectifier that would otherwise be off during a given phase may be turned on to help dissipate excess power and thereby regulate the output voltage. This modulation is based upon both a voltage feedback signal and a current feedback signal.

An alternator and a rectifier thereof are provided. The rectifier includes a transistor and a gate voltage control circuit. The transistor is controlled by a gate voltage. The gate voltage control circuit generates the gate voltage according to a voltage difference between an input voltage and a rectified voltage. During a first time interval after the voltage difference drops to a first preset threshold voltage, the gate voltage control circuit determines whether the voltage difference is less than a second preset threshold voltage, and decides whether to provide the gate voltage to turn on the transistor. When the transistor is turned on, the voltage difference substantially equals to a first reference voltage. And during a second time interval, the gate voltage control circuit regulates the gate voltage to set the voltage difference substantially to a second reference voltage.

An alternator and a rectifier thereof are provided. The rectifier includes a transistor and a gate voltage control circuit. A control end of the transistor receives a gate voltage. The gate voltage control circuit generates the gate voltage according to a voltage difference between an input voltage and a rectified voltage. The gate voltage control circuit detects a first time point when the voltage difference is less than a first preset threshold voltage, provides the gate voltage during a first time interval after the first time point to turn on the transistor, and sets the voltage difference to a first reference voltage. The gate voltage control circuit regulates the gate voltage to set the voltage difference to a second reference voltage during a second time interval after the first time interval. The first time interval is independent of a cycle of the input voltage.

Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.

Disclosed herein is a bridge rectifier and associated control circuitry collectively forming a “regtifier”, capable of both rectifying an input time varying voltage as well as regulating the rectified output voltage produced. To accomplish this, the gate voltages of transistors of the bridge rectifier that are on during a given phase may be modulated via analog control (to increase the on-resistance of those transistors) or via pulse width modulation (to turn off those transistors prior to the end of the phase). Alternatively or additionally, the transistors of the bridge rectifier that would otherwise be off during a given phase may be turned on to help dissipate excess power and thereby regulate the output voltage. A traditional voltage regulator, such as a low-dropout amplifier, is not used in this design.

A device includes a controllable current source connected between a first node and a first terminal coupled to a cathode of a controllable diode. A capacitor is connected between the first node and a second terminal coupled to an anode of the controllable diode. A first switch is connected between the first node and a third terminal coupled to a gate of the controllable diode. A second switch is connected between the second and third terminals. A first diode is connected between the third terminal and the second terminal, an anode of the first diode being preferably coupled to the third terminal.

A power supply switching circuit (100) and methodology are disclosed for connecting the greater of first and second power supplies (V.sub.SUP1, V.sub.SUP2) to an output voltage node (V.sub.OUT) with a comparator (102), active power supply switching circuit (103), gate driver circuit (106), and switching array (SW1-SW5) to generate control signals for a pair of PMOS power switches (MP1, MP2) by remapping first and second voltage supplies (V.sub.SUP1, V.sub.SUP2) to bias the n-wells of the PMOS power switches while simultaneously driving the gate terminals of the PMOS power switches with the gate driver circuit (106) only in response to a comparator activation signal by generating overlapping phase signals (PHI_1, PHI_2) which controls timing of first and second power supply selection signals so that a ground voltage is supplied as the first power supply selection signal only after the maximum bias voltage is supplied as the second power supply selection signal.

A method comprises configuring a power converter to operate as a boost converter, the power converter comprising a low side switch and a high side switch, during a first dead time after turning off the low side switch and before turning on the high side switch, configuring the power converter such that a current of the power converter flows through a high speed diode, and after turning on the high side switch, configuring the power converter such that the current of the power converter flows through a low forward voltage drop diode.

The present description concerns a method of controlling a bidirectional switch (200), including: first (210 1) and (210 2) field-effect transistors electrically in series between first (262 1) and second (262 2) terminals of the bidirectional switch; third (614) and fourth (612) field-effect transistors electrically in series between said first and second terminals of the bidirectional switch, a first connection node (252) in series with the first and second transistors being common with a second connection node (616) in series with the third and fourth transistors, including steps of: receiving a voltage (V200) between the terminals of the bidirectional switch; detecting, from the received voltage, a first sign of said voltage; at least while the first sign is being detected, coupling the first terminal to said first node (252), potentials of control terminals of the first, second, third, and fourth transistors being referenced to the potential (REF) of the first and second nodes having common sources of the first, second, third, and fourth transistors connected thereto.

A hybrid energy storage system includes at least one first energy store and at least a second energy store, each with a nominal energy flow at least in one direction, wherein the energy stores exchange electrical energy with one another and/or with at least one external energy source and/or energy sink via electro-physical energy flows, using at least one control circuit. The control circuit operates the energy sink using at least one boost converter, which has at least one electronic switch, and/or a buck converter in the event of a required energy flow of the energy sink which is higher than the nominal energy flow of the second energy store, with an energy flow of the first energy store, while the second energy store supplies an energy flow from zero up to a constant energy flow which corresponds at maximum to the nominal energy flow of the second energy store.