A radio-frequency switch is disclosed, comprising a set of field-effect transistors disposed between a first node and a second node. In some embodiments, each field-effect transistor of the set of field-effect transistors has a respective source, drain, gate, and body. In some embodiments, the radio-frequency switch includes a compensation circuit coupled in parallel with the set of field-effect transistors, the compensation circuit configured to compensate a non-linearity effect generated by the set of field-effect transistors.

A system for providing bi-directional power flow and power conditioning for high-voltage applications. The system including a normally-off four-quadrant power electronic switch having two gates and two normally-on junction field-effect transistor. The normally-off four-quadrant power electronic switch and the two normally-on junction field-effect transistors are coupled to one another in a bi-cascode configuration.

A switch assembly includes a PIN diode connected between an antenna port and a receive port, a first shunt FET device connected between the receive port and ground, a first series FET device connected between the antenna port and a transmit port, a second shunt FET device connected between the transmit port and ground, and a plurality of bias control contacts configured to receive a corresponding plurality of bias control voltages to forward bias the first shunt FET device and the first series FET device into an ON state and to reverse bias the PIN diode and the second shunt FET device into an OFF state in a transmit mode, and to reverse bias the first shunt FET device and the first series FET device into the OFF state and to forward bias the PIN diode and the second shunt FET device into the ON state in a receive mode.

Disclosed is a low-voltage DC power distribution fast switching device. The device includes a positive output terminal electrically connected to a positive pole of a load, and no less than two switching circuits connected in parallel with each other; the switching circuit includes a positive input terminal electrically connected to a positive pole of common negative power supplies, a supplementary diode cluster composed of no less than one diode connected in series, and a thyristor connected between the positive input terminal and the positive output terminal; the positive input terminal is electrically connected to an anode of the supplementary diode cluster and an anode of the thyristor, and the positive output terminal is electrically connected to a cathode of the complementary diode cluster and a cathode of the thyristor.

This disclosure relates to apparatus and methods for radio-frequency (RF) switching circuits, and more particularly for a PIN diode driver circuit for high speed, high repetition rate and/or high power applications. The PIN diode driver may include a dual voltage reverse bias provided to the PIN diode, which dual voltage reverse bias may be provided by a first, relatively lower voltage, power supply and a second, relatively higher voltage, power supply. The relatively lower voltage is to discharge an intrinsic layer of the PIN diode at a lower voltage than during reverse bias of the PIN diode at the second relatively higher bias voltage in order to reduce overall power consumption.

This disclosure relates to apparatus and methods for radio-frequency (RF) switching circuits, and more particularly for a PIN diode driver circuit for high speed, high repetition rate and/or high power applications. The PIN diode driver may include a dual voltage reverse bias provided to the PIN diode, which dual voltage reverse bias may be provided by a first, relatively lower voltage, power supply and a second, relatively higher voltage, power supply. The relatively lower voltage is to discharge an intrinsic layer of the PIN diode at a lower voltage than during reverse bias of the PIN diode at the second relatively higher bias voltage in order to reduce overall power consumption.

Disclosed is a low-voltage DC power distribution fast switching device. The device includes a positive output terminal electrically connected to a positive pole of a load, and no less than two switching circuits connected in parallel with each other; the switching circuit includes a positive input terminal electrically connected to a positive pole of common negative power supplies, a supplementary diode cluster composed of no less than one diode connected in series, and a thyristor connected between the positive input terminal and the positive output terminal; the positive input terminal is electrically connected to an anode of the supplementary diode cluster and an anode of the thyristor, and the positive output terminal is electrically connected to a cathode of the complementary diode cluster and a cathode of the thyristor.

A drive circuit of a power semiconductor element comprises a gate drive voltage generator to generate, based on an ON/OFF drive timing signal input to an input terminal, a gate drive voltage to be applied to a gate electrode of a switching element having the gate electrode for controlling a main current that flows between a first main electrode and a second main electrode, wherein the gate drive voltage generator includes a gate current limiting circuit in which a current limiter to limit a current and a voltage limiter to limit the magnitude of a voltage applied to both ends of the current limiter are connected in parallel.

A circuit for quenching an avalanche photodiode (APD) detector is disclosed herein. The circuit may comprise a discrete transistor configured to draw a quench current so as to enable a drop in a reverse bias voltage applied to the APD detector, and an integrated circuit connected to the discrete transistor, the integrated circuit including a plurality of circuit elements for controlling the reverse bias voltage.

A circuit for quenching an avalanche photodiode (APD) detector is disclosed herein. The circuit may comprise a discrete transistor configured to draw a quench current so as to enable a drop in a reverse bias voltage applied to the APD detector, and an integrated circuit connected to the discrete transistor, the integrated circuit including a plurality of circuit elements for controlling the reverse bias voltage.