Circuits and methods for balancing Bias Temperature Instability (BTI) are disclosed. An inverter circuit comprises an inverter input node configured to receive an inverter input signal, wherein the inverter input node is coupled to gates of an inverter pair, wherein the inverter pair includes an inverter pair n-type metal-oxide-semiconductor (NMOS) transistor and an inverter pair p-type metal-oxide-semiconductor (PMOS) transistor, an inverter output node configured to provide an inverter output signal, wherein the inverter output signal is an inversion of the inverter input signal, and at least one balancing transistor configured to balance a voltage at a source of the inverter pair PMOS, a source of the inverter pair NMOS, or any combination thereof.

Aspects generally relate to receivers, and in particular to a receiver that converts a high-voltage input signal into a low-voltage signal. The high voltage input signal is split into a upper portion and a lower portion. The upper portion is coupled to a high input receiver that is powered by dynamic supply shifters that can vary supply voltage during operation to optimize switching.

A method and apparatus for dynamically matching a plurality of resistors to a sensor are disclosed. In the method and apparatus, a switching block of a plurality of switching blocks receives a plurality of selection signals. The switching block is coupled to a resistor array having a plurality of resistors that are coupled in series and arranged in a closed loop. Each two resistors are coupled to each other by a respective resistor node of a plurality of resistor nodes. The switching block of the plurality of switching blocks has a plurality of input nodes and an output node, where the output node is coupled to the respective resistor node of the plurality of resistor nodes. In the method and apparatus, the switching block couples an input node of the plurality of input nodes to the output node based on the selection signals.

A PVT detection circuit including: first and second transistors of a first conduction type each having its control node coupled to a control line, the first and second transistors being configured such that the variations in their threshold voltages as a function of temperature and/or process are different from each other; and an amplifier coupled to a second main conducting node of each of the first and second transistors and configured to amplify a difference in the currents conducted by the first and second transistors in order to generate an output signal.

An integrated circuit system is provided. The system includes a ring oscillator including a first plurality of logic gates connected in a ring configuration. The system also includes a second plurality of logic gates used to implement a heater to generate a controlled amount of heat. The second plurality of logic gates is also used to implement a temperature sensor to measure a temperature of the ring oscillator. The system further includes one or more logic circuits coupled to the heater and the temperature sensor. The one or more logic circuits are used to control the heater to heat the ring oscillator only until the temperature of the ring oscillator is one of a plurality of predefined temperatures, during or after which the ring oscillator starts and operate.

Methods and systems are described for generating a process-voltage-temperature (PVT)-dependent reference voltage at a reference branch circuit based on a reference current obtained via a band gap generator and a common mode voltage input, generating a PVT-dependent output voltage at an output of a static analog calibration circuit responsive to the common mode voltage input and an adjustable current, adjusting the adjustable current through the static analog calibration circuit according to a control signal generated responsive to comparisons of the PVT-dependent output voltage to the PVT-dependent reference voltage, and configuring a clocked data sampler with a PVT-calibrated current by providing the control signal to the clocked data sampler.

A supply-less transmitter output termination resistor with high accuracy is presented. This termination resistor can be used for applications with high supply voltage and low voltage devices. The termination resistor is programmable and includes many parallel branches. Each branch can be turned off or on with a switch. The biasing for the switch is in such a way that it keeps the resistance of the switch constant independent of the supply voltage or the output common mode voltage. This will increase the accuracy of the termination resistor. Besides HDMI this technique can be used for many other applications.

Clock generation and control in a semiconductor system having process, voltage and temperature (PVT) variation. A semiconductor device may include at least first and second ring oscillators, each disposed at locations respectively closest to first and second logic circuits of an operation circuit, and generating first and second oscillating signals. A detecting circuit is configured to perform a predetermined logic operation on the first oscillating signal and the second oscillating signal to generate a first clock signal. A calibration circuit is configured to receive the first clock signal from the detecting circuit and perform a delay control on each of the first ring oscillator and the second ring oscillator to generate a second clock signal for operating the operation circuit.

A method for driving a load includes driving a load to an initial voltage within a voltage window, the voltage window based on an input voltage and an offset voltage, and driving the load to approximately the input voltage.

Disclosed are techniques that can be used in a semiconductor chip to determine performance such as timing performance. Among other features, supply voltages and clock rates may be adjusted to accommodate the operating temperature and to compensate for the processing variations that occurred when that chip was produced, or may occur as the chip is used. The techniques include determining a series of variables that affect performance, determining the sensitivity of timing paths in the circuit to each variable, duplicating the most sensitive paths. A novel sensor circuit is produced that includes the sensitive paths, which can be used to determine when the chip is performing as required and when it is not, and adjusting one or more supply voltages and/or clock rates in a static or real time manner when the circuit is not performing as required.