A memory card includes a memory that stores data, a driver that transmits the data received from the memory, and at least one transmitter that transmits the data received from the driver to a receiver provided in an external main unit. The driver and the transmitter are provided in a single IC (Integrated Circuit) chip and are not overlapped with each other in planar view, and the transmitter includes a coil.

A line driver includes a first resistive component, a second resistive component, an operational amplifier and an adjustable current mirror array circuit. A first terminal of the second resistive component and the first resistive component are coupled to a node, and a second terminal of the second resistive component is coupled to an output terminal. The operational amplifier receives a common mode voltage through the first resistive component, and generates a first signal and a second signal according to the common mode voltage and an input signal. The adjustable current mirror array circuit generates a first current to the node and a second current to the output terminal in response to the first and second signals, and adjusts a ratio of the second current to the first current in response to multiple control bits so as to set an output impedance of the output terminal.

A potentiostat is an essential piece of analytical equipment for studying electrochemical devices and reactions. As the design of electrochemical devices evolve, applications for systems with multiple working electrodes have become more common. These applications drive a need for low-cost multi-channel potentiostat systems.

Embodiments describe herein include a portable, low-cost and scalable system with a modular design that can support 8 to 64 channels at a cost as low as $8 per channel. This design can replace the functionality of commercial potentiostats which cost upwards of $10k for certain applications. Each channel in the multi-channel potentiostat has an independent adjustable voltage source with a built-in ammeter and switch, making the device flexible for various configurations. The multi-channel potentiostat can be designed for low current applications (nA range), but its purpose can change by varying its shunt resistor value. The system can either function as a standalone device or remotely controlled. We demonstrate the functionality of this system for the control of a 24-channel bioelectronic ion pump for open- and closed-loop control of pH.

An improved cross-coupled voltage level shifter is disclosed that is capable of achieving substantially higher data transfer speeds with reduced transistor sizes than existing cross-coupled voltage level shifters. The voltage level shifter includes a cross-coupled latch, control circuitry that initiates a state transition of the latch responsive to activation, where the control circuitry is activated by a change in a logic voltage level of an input signal to the voltage level shifter, and feedback circuitry that reinforces the latch action of the cross-coupled latch. The control circuitry may include pull-down transistors that are thin-gate devices, and thus, substantially smaller in area than what would otherwise be needed to meet the large current requirement of the pull-down transistors as compared to latch transistors of the latch.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit, and at least one logic circuit to transmit, via the interface, a sensor ID parameter and a limit parameter, the sensor ID parameter indicating a first sensor ID. The logic circuit is to receive, via the interface, a first request corresponding to the first sensor ID with the component connected to the apparatus and the apparatus not pneumatically actuating the component. The logic circuit is to transmit, via the interface, a first digital value in response to the first request. The logic circuit is to receive, via the interface, a second request corresponding to the first sensor ID with the component connected to the apparatus and the apparatus pneumatically actuating the component. The logic circuit is to transmit, via the interface, a second digital value in response to the second request. A difference between the first digital value and the second digital value is greater than the limit parameter.

A semiconductor device includes a latch circuit including a first inverter configured to output a first signal based on an input signal, a second inverter configured to output a first clock signal based on a first strobe signal, a third inverter configured to output a second clock signal based on a second strobe signal, a first clock generation circuit configured to generate a third clock signal having transitions that are delayed with respect to the first clock signal, a second clock generation circuit configured to generate a fourth clock signal having transitions that are delayed with respect to the second clock signal, a fourth inverter configured to output an inversion signal of the first signal in accordance with the third and fourth clock signals, and a data latch circuit configured to latch an output signal of the fourth inverter.

Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values.

Aspects of this disclosure relate to voltage generators, such as negative voltage generators. In certain configurations, a negative voltage generator includes a charge pump controllable by a clock signal and configured to provide a negative voltage at an output node, an oscillator configured to activate based on an enable signal and to provide the clock signal to the charge pump, a comparator configured to generate the enable signal based on comparing a feedback voltage with a reference value, a voltage divider electrically connected between a positive voltage node and the output node and configured to generate the feedback voltage at a feedback node, and a start-up capacitor electrically connected between the positive voltage node and the feedback node and configured to control a settling time of the feedback voltage.

On a semiconductor die, a testing controller identifies a first partition unit with a first operating frequency lower than a second operating frequency of an adjacent second partition unit. A metal mask is added between one or more first header switches of the first partition unit and one or more second header switches of the second partition unit to allow the first partition unit to use a selection of the one or more second header switches for power distribution to the first partition unit.

A drive signal generator includes a drive signal generator that generates a drive signal for driving a capacitive load. In the drive signal generator, a set of a first MOSFET and a second MOSFET which are electrically connected in series between a wire of a high potential and a wire of a low potential is arranged in plurality in series. A part or all of the first MOSFETs and the second MOSFETs in the plurality of sets have different sizes from each other.