A single wire digital communication system for use with an ultrasonic surgical instrument and an ultrasonic surgical instrument including a single wire digital communication system. The single wire digital communication system includes first transmitter logic buffer and first receiver logic buffer operably coupled to a first single wire device via a first single wire communication bus. The single wire digital communication system also includes a first differential transceiver operational amplifier operably coupled to the first transmitter logic buffer via a first transmitter signal line and operably coupled to the first receiver logic buffer via a first receiver signal line. A second differential transceiver operational amplifier is operably coupled to the first differential transceiver operational amplifier via at least one differential bus. A second single wire device is operably coupled to the differential bus and configured to communicate with the first single wire device.

An integrated circuit which adjusts a period for enabling a transmitter, and includes a data delay circuit delaying data to generate transmission data; a transmission/reception terminal; a receiver receiving reception data transferred to the transmission/reception terminal, in response to a reception enable signal; a transmitter transmitting the transmission data to the transmission/reception terminal in response to a transmission enable signal; a shift circuit generating a plurality of preliminary transmission enable signals by sequentially delaying a signal; a phase comparison circuit comparing a phase of each of the plurality of preliminary transmission enable signals and a phase of the transmission data; and a selection circuit selecting one of the plurality of preliminary transmission enable signals as a transmission enable signal according to a phase comparison result of the phase comparison circuit. Since only one phase comparison circuit is used, a circuit area for generating the transmission enable signal may be reduced.

Systems, methods, and devices for monitoring operation of industrial equipment are disclosed. In one embodiment, a monitoring system is provided that includes a passive backplane and one more functional circuits that can couple to the backplane. Each of the functional circuits that are coupled to the backplane can have access to all data that is delivered to the backplane. Therefore, resources (e.g., computing power, or other functionality) from each functional circuits can be shared by all active functional circuits that are coupled to the backplane. Because resources from each of the functional circuits can be shared, and because the functional circuits can be detachably coupled to the backplane, performance of the monitoring systems can be tailored to specific applications. For example, processing power can be increased by coupling additional processing circuits to the backplane.

A wireless headphone system, a wireless headphone, and a base. The wireless headphone system includes the wireless headphone and the base. The base includes a base RXD wire, a base TXD wire, a base connection wire, and a base triode; and the wireless headphone includes a wireless headphone RXD wire, a wireless headphone TXD wire, a wireless headphone connection wire, and a wireless headphone transistor. The base RXD wire and the base TXD wire are connected together through the base transistor and led out through the base connection wire. The wireless headphone RXD wire and the wireless headphone TXD wire are connected together through the wireless headphone transistor and led out through the wireless headphone connection wire. When the headphone is charged on the base, two-way communication between the headphone and the base can still be implemented while maintaining the existing three-wire design.

Interface circuits that may utilize a limited number of pins to detect a presence of an accessory, determine whether the accessory can provide or receive power, communicate with the accessory regarding at least that transfer of power, and transfer power accordingly. One example may provide detection circuitry for a host that may detect the presence of a pull-down resistor on a data pin of an accessory. The pull-down may indicate that a power consuming accessory has been connected. This example may detect the presence of power on a power pin. The presence of the power on the power pin may indicate that a power providing accessory has been connected.

The invention relates to a communication interface between a control unit and an electric load unit, particularly a load unit having a pump motor in a motor vehicle, wherein the control unit is designed as a transmitter and/or receiver, wherein the load unit is designed as a receiver and/or transmitter and wherein the communication between the transmitter and the receiver takes place via a signal line by means of a pulse-width-modulated signal. In this case, there is provision for the signal line to be connected to a constant current source and for the transmitter to be designed to modulate the flow of current through the signal line by means of pulse-width modulation. The invention further relates to a method for operating such a communication interface.

A programmable input/output (I/O) circuit includes an output buffer coupled between an output signal and an I/O pad and an input comparator coupled between an input signal and the I/O pad. The input comparator includes a first input coupled to the I/O pad. A multiplexor receives a select signal for selecting a first reference voltage from the plurality of reference voltages at a first time and for dynamically selecting a second reference voltage from the plurality of reference voltages at a second time.

Examples described herein are used in timing synchronization systems. A timing synchronization system provides circuits that support bi-directional half-duplex voltage signals (transmit or receive) but protect against incorrect input/output configuration whereby a transmit signal media is connected to a receive port or a receive signal media is connected to a transmit port. The system provides configurable signal propagation by use of parallel connection of two or more buffer in series with a resistor. Various isolation circuitry and resistors can be used to protect against signal transmission during receive mode.

A device including an optoelectric circuit that is configured to provide galvanic isolation between a first circuit and a second circuit is disclosed. The optoelectric circuit includes at least one non-inverting buffer and a metal semiconductor diode. The at least one non-inverting buffer is positioned between a collector of a phototransistor and an anode of a light emitting diode. The metal semiconductor diode is positioned between the collector of the phototransistor and the at least one non-inverting buffer.

A gate driver includes a high-side region that operates in a first voltage domain, a low-side region that operations in a second voltage domain lower than the first voltage domain, a termination region interposed between the high-side region and the low-side region and configured to isolate the first voltage domain from the second voltage domain, a high-side gate driver disposed in the high-side region and configured to drive a high-side power transistor, a low-side gate driver disposed in the low-side region and configured to drive a low-side power transistor, and a plurality of termination diodes disposed in the termination region and configured to transmit information bits between the high-side region and the low-side region, where each of the plurality of termination diodes includes an anode coupled to the low-side region and a cathode coupled to the high-side region.