H03K19/18

NON VOLATILE RESISTIVE MEMORY LOGIC DEVICE

A resistance switching RAM logic device is presented. The device includes a pair of resistance switching RAM cells that may be independently programed into at least a low resistance state (LRS) or a high resistance state (HRS). The resistance switching RAM logic device may further include a shared output node electrically connected to the pair of resistance switching RAM cells. A logical output may be determined from the programmed resistance state of each of the resistance switching RAM cells.

METHODS AND SYSTEMS OF ASSERTIONAL SIMULATION

Managing looped, iterative and recursive operations through applying a parameterized instance of an assertion-model apportionment-sub-model pair to a reference data model to produce a parameterized outcome model. Based on a degree of convergence of the parameterized outcome model toward a target parameterized instance of the assertion-model apportionment-sub-model pair, assembling and parameterizing a next assertion-model and a next apportionment-sub-model pair. Repeating these steps until an instance of a parameterized outcome model meets a preconfigured degree of convergence toward a corresponding target parameterized instance of the assertion-model apportionment-sub-model pair.

LOGIC COMPUTING
20210367141 · 2021-11-25 ·

A computing device including a logic track including two logic-track magnetic domains separated by a logic-track domain wall, an input track arranged crossing the logic track at a first position of the logic track, and an output track arranged crossing the logic track at a second position of the logic track near the logic-track domain wall. The input track includes at least one input-track magnetic domain, and each of the at least one input-track magnetic domain includes at least one input-track storage unit configured to store binary 0 or 1. The output track includes at least one output-track magnetic domain, and each of the at least one output-track magnetic domain includes at least one output-track storage unit configured to store binary 0 or 1.

LOGIC DEVICE USING SKYRMION
20210367602 · 2021-11-25 ·

The present invention relates to a logic device using skyrmion, which comprises an input part; an output part; and an operation part located between the input part and the output part and includes at least one notch where the skyrmion can be annihilated, and in which the skyrmion moves from the input part to the output part by the applied current. The logic device provided in one aspect of the present invention consumes relatively little power, can have high integration, and has an effect of having a very simple structure compared to the conventional logic device by using the annihilation of skyrmion.

LOGIC DEVICE USING SKYRMION
20210367602 · 2021-11-25 ·

The present invention relates to a logic device using skyrmion, which comprises an input part; an output part; and an operation part located between the input part and the output part and includes at least one notch where the skyrmion can be annihilated, and in which the skyrmion moves from the input part to the output part by the applied current. The logic device provided in one aspect of the present invention consumes relatively little power, can have high integration, and has an effect of having a very simple structure compared to the conventional logic device by using the annihilation of skyrmion.

Spin-transfer torque device
11177433 · 2021-11-16 · ·

The disclosed technology generally relates semiconductor devices, and relates more particularly to a spin transfer torque device, a method of operating the spin-transfer torque device and a method of fabricating the spin-transfer torque device. According to one aspect, a spin-transfer torque device includes a magnetic flux guide layer and a set of magnetic tunnel junction (MTJ) pillars arranged above the magnetic flux guide layer. Each one of the pillars includes a separate free layer, a separate tunnel barrier layer and a separate reference layer. A coupling layer is arranged between the magnetic flux guide layer and the MTJ pillars, wherein a magnetization of the separate free layer of each of the each of the MTJ pillars is coupled, parallel or antiparallel, to a magnetization of the magnetic flux guide layer through the coupling layer.

Spin-transfer torque device
11177433 · 2021-11-16 · ·

The disclosed technology generally relates semiconductor devices, and relates more particularly to a spin transfer torque device, a method of operating the spin-transfer torque device and a method of fabricating the spin-transfer torque device. According to one aspect, a spin-transfer torque device includes a magnetic flux guide layer and a set of magnetic tunnel junction (MTJ) pillars arranged above the magnetic flux guide layer. Each one of the pillars includes a separate free layer, a separate tunnel barrier layer and a separate reference layer. A coupling layer is arranged between the magnetic flux guide layer and the MTJ pillars, wherein a magnetization of the separate free layer of each of the each of the MTJ pillars is coupled, parallel or antiparallel, to a magnetization of the magnetic flux guide layer through the coupling layer.

Nonvolatile logic circuit

A nonvolatile logic circuit includes: a memory unit having a pair of resistive memory elements; a computation unit connected to the memory unit and configured to perform an operation based on an input signal and a logic value corresponding to a resistance state of the pair of resistive memory elements; a determination circuit configured to determine whether the resistance state of the pair of resistive memory elements is a complementary state or a non-complementary state; and an output circuit connected to the computation unit and the determination circuit, and configured to output a signal corresponding to an operation result by the computation unit or a signal corresponding to a determination result by the determination circuit.

Nonvolatile logic circuit

A nonvolatile logic circuit includes: a memory unit having a pair of resistive memory elements; a computation unit connected to the memory unit and configured to perform an operation based on an input signal and a logic value corresponding to a resistance state of the pair of resistive memory elements; a determination circuit configured to determine whether the resistance state of the pair of resistive memory elements is a complementary state or a non-complementary state; and an output circuit connected to the computation unit and the determination circuit, and configured to output a signal corresponding to an operation result by the computation unit or a signal corresponding to a determination result by the determination circuit.

Spin logic device based on spin-charge conversion and spin logic array using the same

Disclosed are a spin logic device based on spin-charge conversion and a spin logic array using the same. A reconfigurable spin logic array according to an exemplary embodiment of the present invention may include: an input terminal receiving at least three current signals; a plurality of wires transmitting the current signal in connection with the input terminal and including a horizontal wire and a vertical wire which cross each other; a first gate array in which at least one first majority gate connected to the input terminal through the wires and implemented based on the spin logic device is arranged; and a second gate array in which at least one second majority gate connected to the first gate array through the wires and implemented based on the spin logic device is arranged.