In accordance with at least one embodiment, a method for detecting a liquid level includes providing a container (402) having a cavity, and disposing a sensor (102) in the cavity of the container (402), such that a ground pattern (310) on a first surface of the sensor (102) is positioned to contact a liquid in the cavity. A first electrode (104) and a second electrode (106) are located on a second surface of the sensor (102). The sensor (102) is coupled to a sensor input and a sensor driver. A cable coupling the sensor (102) to a touch sensor (116) comprises a shield line (112, 114) that is coupled to ground.

A radio-frequency switch is disclosed, comprising a set of field-effect transistors disposed between a first node and a second node. In some embodiments, each field-effect transistor of the set of field-effect transistors has a respective source, drain, gate, and body. In some embodiments, the radio-frequency switch includes a compensation circuit coupled in parallel with the set of field-effect transistors, the compensation circuit configured to compensate a non-linearity effect generated by the set of field-effect transistors.

A hand held domestic appliance comprises a handle part, a driven member, a motor for driving the driven member and a controller for controlling the motor. The handle part comprises a surface sensor for detecting a contact surface area and optionally also pressure and the controller is adapted to control the power supplied to the motor in dependence on the sensed contact surface area and optionally also pressure.

A capacitive sensor device includes a sensor electrode coupled to a first switch and coupleable either to a sensor operating voltage or to an evaluation circuit, configured as a power source circuit. A first current path is coupleable to the sensor electrode at an input end and to ground via a collector and emitter of a first transistor by an auxiliary resistor. A second current path is coupled to a reference potential at one end. A capacitor is coupled between the reference potential and a second transistor. A second auxiliary resistor is arranged in the second current path. The first transistor's base and collector are coupled to the base of the second transistor. A compensation capacitor has a first terminal coupled to the first current path and a second terminal couplable to a compensation voltage, to ground, or in a floating manner via a second switch.

A radio-frequency switch is disclosed, comprising a set of field-effect transistors disposed between a first node and a second node. In some embodiments, each field-effect transistor of the set of field-effect transistors has a respective source, drain, gate, and body. In some embodiments, the radio-frequency switch includes a compensation circuit coupled in parallel with the set of field-effect transistors, the compensation circuit configured to compensate a non-linearity effect generated by the set of field-effect transistors.

An aperture tuner circuit includes a plurality of switching terminals, at least one auxiliary terminal, at least one open/short/load (OSL) calibration circuit and a switch network. The OSL calibration circuit is connected to the at least one auxiliary terminal and selectively configurable to provide one of a predetermined open path, a predetermined short path and predetermined load to the aperture tuner circuit. The switch network is connected to the plurality of switching terminals and configured to selectively establish and reconfigure signal paths between the switching terminals.

The invention relates to a method for determining the phase difference between a first clock signal (CK1) received by a first electronic component (CE1) and a second clock signal (CK2) received by a second electronic component (CE2), comprising the steps of: S10) transmitting a first calibration signal (S12); S20) measuring a first delay (T.sub.1); S30) transmitting a second calibration signal (S21); S40) measuring a second delay (T.sub.2); S50) measuring the number (n) of clock pulses between the transmission of the first calibration signal (S12) and the active edge of the first clock signal (CK1) consecutive to the active edge of the second calibration signal (S21); S60) determining the phase difference depending on the parity of the number (n) of clock pulses.