A machine learning (ML)-based phase current balancer for a multiphase power converter includes one or more inputs, one or more outputs, and an artificial neural network. The artificial neural network includes a plurality of artificial neurons and is trained to provide corrective phase current imbalance information at the one or more outputs for correcting phase current imbalance within the multiphase power converter, based on information available at the one or more inputs and indicative of individual phase currents of the multiphase power converter.

The disclosure provides a data acquisition device. The data acquisition device includes a sensor that detects a physical quantity as analog data; a digital storage circuit that stores the physical quantity as digital data; a difference circuit that calculates a difference between a previous value of the physical quantity stored in the digital storage circuit and a current value of the physical quantity detected as analog data; and a comparison circuit that compares the difference with a predetermined threshold value; and a control unit. The control unit stores a value calculated by adding or subtracting a predetermined change amount to a previous value of the physical quantity stored in the digital storage circuit as the current value, when the difference exceeds or falls below the threshold value. Since the physical quantity is updated without executing A/D conversion, a decrease in the sampling frequency is suppressed.

An electronic control unit includes a pair of D/A conversion circuits, which performs D/A conversion processing of a pair of digital data and outputs a pair of analog signals. Each of the pair of D/A conversion circuits performs the D/A conversion processing by splitting input digital data into more-significant digital data and less-significant digital data. More-significant D/A conversion part performs analog conversion processing in accordance with the more-significant digital data by using an element string circuit, which outputs split voltages by splitting predetermined reference voltages. The more-significant conversion circuits output a maximum value and a minimum value in absolute voltage ranges, which are different from each other, in accordance with the more-significant digital data. Less-significant conversion parts perform analog conversion processing in accordance with less-significant digital data by using the maximum value and the minimum value of the different absolute voltage ranges, which are outputted from the more-significant D/A conversion parts, as reference voltages. The element string circuit is shared by the pair of D/A conversion circuits.

An electronic circuit system with an input for receiving an analog signal having a frequency and comprising noise, that noise including input referred noise, and the noise fluctuates in a range. The system also comprises a signal path with: (i) an analog to digital converter for providing a digital output value in response to a clock period; (ii) a feedback node; and (iii) circuitry for limiting a signal swing at the feedback node, during a period of the clock period, to be no greater than an RMS value of the noise. The analog to digital converter is further for providing the digital output value in response to the analog signal and the signal swing at the feedback node.

The present invention provides a signal processor that improves a resolution of a phase detection without increasing a clock frequency of a controller or decreasing a frequency of an excitation signal. A signal processor 10 includes a comparator 11 that compares a signal obtained by phase modulating a carrier frequency at a rotor rotation angle of a resolver with a dither signal.

A high dynamic range sensing front-end for bio-signal recording systems in accordance with embodiments of the invention are disclosed. In one embodiment, a bio-signal amplifier includes an input signal, where the input signal is modulated to a predetermined chopping frequency, a first amplifier stage, a parallel-RC circuit connected to the first amplifier stage and configured to generate a parallel-RC circuit output by selectively blocking an offset current, a second amplifier stage connected to the parallel-RC circuit that includes a second input configured to receive the parallel-RC circuit output and generate a second output that is an amplified version of the input signal with ripple-rejection. Further, the bio-signal amplifier can also include an auxiliary path configured for boosting input impedance by pre-charging at least one input capacitor. In addition, the bio-signal amplifier can also include a DC-servo feedback loop that includes an integrator that utilizes a duty-cycled resistor.

A supply-to-digital regulation loop (SDRL) circuit, including a reference supply circuit and a local supply circuit. The reference supply circuit includes a reference supply-to-digital converter (SDC) to convert an analog reference supply voltage to a digital reference signal. The local supply circuit is coupled to the reference supply circuit. The local supply circuit includes a local SDC to convert an analog local supply voltage to a digital local supply signal based on a digital feedback signal, and a local monitoring circuit to monitor the digital feedback signal based on a comparison of the digital local supply signal with the digital reference signal routed from the reference SDC of the reference supply circuit.

An integrated circuit connectable to a sensor includes a transconductance element and a current-input analog-to-digital converter (I-ADC). The transconductance element is connectable to the sensor and is configured to generate a current signal representative of an output of the sensor. The I-ADC is configured to sample and quantize the current signal to generate a corresponding digital sensor signal. The I-ADC includes a continuous-time (CT) integrator stage, a discrete-time (DT) integrator stage, and a feedback digital-to-analog converter (FB-DAC). The CT integrator stage is configured to receive the current output and the I-ADC is configured to generate the digital sensor signal based on an output of the CT integrator stage and an output of the DT integrator stage. The FB-DAC is configured to provide a feedback signal based on the digital sensor signal for adding to the current signal.

An integrated circuit connectable to a sensor includes a transconductance element and a current-input analog-to-digital converter (I-ADC). The transconductance element is connectable to the sensor and is configured to generate a current signal representative of an output of the sensor. The I-ADC is configured to sample and quantize the current signal to generate a corresponding digital sensor signal. The I-ADC includes a continuous-time (CT) integrator stage, a discrete-time (DT) integrator stage, and a feedback digital-to-analog converter (FB-DAC). The CT integrator stage is configured to receive the current output and the I-ADC is configured to generate the digital sensor signal based on an output of the CT integrator stage and an output of the DT integrator stage. The FB-DAC is configured to provide a feedback signal based on the digital sensor signal for adding to the current signal.

Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.