This application relates to time-encoding modulators (TEMs). A TEM receives an input signal (S.sub.IN) and outputs a time-encoded output signal (S.sub.OUT). A filter arrangement receives the input signal and also a feedback signal (S.sub.FB) from the TEM output, and generates a filtered signal (S.sub.FIL) based, at least in part, on the feedback signal. A comparator receives the filtered signal and outputs a time-encoded signal (S.sub.PWM) based at least in part on the filtered signal. The time encoding modulator is operable in a first mode with the filter arrangement configured as an active filter and in a second mode with the filter arrangement configured as a passive filter. The filter arrangement may include an op-amp, capacitance and switch network. In the first mode the op-amp is enabled, and coupled with the capacitance to provide the active filter. In the second mode the op-amp is disabled and the capacitance is coupled to a signal path for the feedback signal to provide a passive filter.

A digital signal processor (DSP) for a receiver and a method for processing signals in a receiver are provided. The DSP comprises a processor configured to: receive a digital signal at a symbol rate in a frequency domain; and compensate an impairment of the digital signal in the frequency domain.

A digital signal processor (DSP) for a receiver and a method for processing signals in a receiver are provided. The DSP comprises a processor configured to: receive a digital signal at a symbol rate in a frequency domain; and compensate an impairment of the digital signal in the frequency domain.

A multi-band remote unit is disclosed. The multi-hand remote unit includes a number of radio frequency (RF) front-end circuits configured to generate a number of downlink RF communications signals associated with a number of frequency bands based on a number of downlink digital communications signals, respectively. The multi-band remote unit also includes a digital interface circuit and a digital processing circuit. The digital interface circuit is configured to receive an encapsulated downlink digital communications signal and generate the downlink digital communications signals associated with the frequency bands based on the encapsulated downlink digital communications signal. The digital processing circuit is configured to digitally process the downlink digital communications signals before providing the downlink digital communications signals to the RF front-end circuits. As such, it may be possible to share the digital processing circuit among RF front-end circuits, thus helping to reduce cost and/or power consumption of the multi-band remote unit.

A multi-band remote unit is disclosed. The multi-hand remote unit includes a number of radio frequency (RF) front-end circuits configured to generate a number of downlink RF communications signals associated with a number of frequency bands based on a number of downlink digital communications signals, respectively. The multi-band remote unit also includes a digital interface circuit and a digital processing circuit. The digital interface circuit is configured to receive an encapsulated downlink digital communications signal and generate the downlink digital communications signals associated with the frequency bands based on the encapsulated downlink digital communications signal. The digital processing circuit is configured to digitally process the downlink digital communications signals before providing the downlink digital communications signals to the RF front-end circuits. As such, it may be possible to share the digital processing circuit among RF front-end circuits, thus helping to reduce cost and/or power consumption of the multi-band remote unit.

A multi-band remote unit is disclosed. The multi-band remote unit includes a number of radio frequency (RF) front-end circuits configured to generate a number of downlink RF communications signals associated with a number of frequency bands based on a number of downlink digital communications signals, respectively. The multi-band remote unit also includes a digital interface circuit and a digital processing circuit. The digital interface circuit is configured to receive an encapsulated downlink digital communications signal and generate the downlink digital communications signals associated with the frequency bands based on the encapsulated downlink digital communications signal. The digital processing circuit is configured to digitally process the downlink digital communications signals before providing the downlink digital communications signals to the RF front-end circuits. As such, it may be possible to share the digital processing circuit among RF front-end circuits, thus helping to reduce cost and/or power consumption of the multi-band remote unit.

A multi-band remote unit is disclosed. The multi-band remote unit includes a number of radio frequency (RF) front-end circuits configured to generate a number of downlink RF communications signals associated with a number of frequency bands based on a number of downlink digital communications signals, respectively. The multi-band remote unit also includes a digital interface circuit and a digital processing circuit. The digital interface circuit is configured to receive an encapsulated downlink digital communications signal and generate the downlink digital communications signals associated with the frequency bands based on the encapsulated downlink digital communications signal. The digital processing circuit is configured to digitally process the downlink digital communications signals before providing the downlink digital communications signals to the RF front-end circuits. As such, it may be possible to share the digital processing circuit among RF front-end circuits, thus helping to reduce cost and/or power consumption of the multi-band remote unit.

A memory system includes a plurality of first memory units, a plurality of read word lines, and a plurality of read bit lines. Each first memory unit of the plurality of first memory units includes a second memory unit, a first transistor coupled to the second memory unit, and a second transistor coupled to the second memory unit and the first transistor. Each read word line of the plurality of read word lines is coupled to a plurality of first transistors disposed along a corresponding row. Each read bit line of the plurality of read bit lines is coupled to a plurality of second transistors disposed along a corresponding column.

Embodiments of the present disclosure relate to various methods and example systems for carrying out analog-to-digital conversion of data acquired by arrays of nanogap sensors. The nanogap sensors described herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap. In general, the methods and systems proposed herein rely on digitizing the signal as the signal is being integrated, and then integrating the digitized results. With such methods, the higher sample rate used in the digitizer reduces the charge per quantization and, therefore, the size of sampling capacitors used. Consequently, sampling capacitors may be made factors of magnitude smaller, requiring less valuable space on a chip compared to sampling capacitors used in conventional nanogap sensor arrays.

A method is provided for improving the EMC robustness of Integrated Capacitive Sensor systems with a sensor Signal-Conditioner (SSC). The SSC is connected with a capacitive integrating converter to convert a received signal into a bit stream. An oscillator provides a plurality of sampling frequencies. A counter connected with the capacitive integrating converter collects the bit stream and calculates the digital representative of the physical input which is than stored in an output register. The method includes performing some conversions with different sampling frequencies from the oscillator or a frequency divider by the capacitive integrating Signal-Converter; storing the results of the samplings and using the results in the following cycle to calculate for each sampling frequency a difference to the prior sampling of the same frequency; and calculating the digital representative of the input signal from the external sensing capacitor as the reverse weighted average of the samplings of the different frequencies.