Provided are a scalable analog passive intermodulation (PIM) module, a method of controlling analog PIM, a signal processing circuit, and a sensor device. The scalable analog PIM module includes a first plural number of digital-to-analog converters (DACs), a first plural number of static random access memory (SRAM) calculators connected to the first plural number of DACs, at least one analog-to-digital converter (ADC) connected to the first plural number of SRAM calculators and configured to convert an analog convolution result signal into digital convolution data, and an analog PIM controller configured to output an enable control signal for enabling a second number, which is equal to or less than first plural number, of SRAM calculators among the first plural number of SRAM calculators to the first plural number of SRAM calculators on the basis of the convolution data output from the ADC.

A power converter system for converting an input voltage at an input into an output voltage at an output may comprise a switch network comprising a reactive circuit element and a plurality of switches, switch control circuitry configured to operate the plurality of switch in a plurality of periodic, sequential states to regulate the output voltage, and reference current generating circuitry. The reference current generating circuitry may include a comparator coupled to a sensed switch of the plurality of switches and configured to compare a current flowing through the sensed switch to a reference current and current-steering circuitry coupled to the comparator configured to generate the reference current and alternate the reference current between a first reference current and a second reference current whenever the switch control circuitry changes from one state of the plurality of periodic, sequential states to another state of the plurality of periodic, sequential states.

A DWA circuit includes: a thermometer conversion unit configured to convert an input digital signal into a thermometer code; a shift amount storage unit configured to store a shift amount; a shift unit configured to cyclically shift the thermometer code; an arrangement conversion unit configured to supply, to an analog output circuit, an output control code obtained by converting a bit arrangement of a shifted code; and an update unit configured to update the shift amount, in which the shifted code includes a plurality of unconverted bit fields, the output control code includes a plurality of converted bit fields, and the arrangement conversion unit is configured to perform arrangement conversions on a plurality of bits having a same position in a bit field in the plurality of unconverted bit fields, to arrange the plurality of bits in a same converted bit field among the plurality of converted bit fields.

Many electronic circuits rely on the ratio of one component to other components being well defined. Current flow in component can warm the component causing its electrical properties to change, for example the resistance of a resistor may increase due to self-heating as a result of current flow. The present disclosure provides a way to reduce temperature variation between components so as to reduce electrical mismatch between them or the consequences of such mismatch. This is important as even a change of resistance of, for example, 20-50 ppm in a resistor can result in non-linearity exceeding the least significant bit value of a 16 bit digital to analog converter.

An electronic device may include digital circuitry to operate via digital signals and analog circuitry to operate via analog signals. The electronic device may also include a fractal digital to analog converter (DAC) to convert a digital signal into an analog signal. The fractal DAC may include a unit cell array having a branching data path and multiple unit cells disposed in a fractal pattern. The fractal DAC may also include multiple decision units disposed within the unit cell array on the branching data path. Each decision unit may receive an incoming signal representative of at least a portion of the digital signal and direct each decision unit output to different branches of the unit cell array. The unit cells may be enabled based at least in part on the decision unit outputs to generate the analog signal.

An electronic device may include digital circuitry to operate via digital signals and analog circuitry to operate via analog signals. The electronic device may also include a fractal digital to analog converter (DAC) to convert a digital signal into an analog signal. The fractal DAC may include a unit cell array having a branching data path and multiple unit cells disposed in a fractal pattern. The fractal DAC may also include multiple decision units disposed within the unit cell array on the branching data path. Each decision unit may receive an incoming signal representative of at least a portion of the digital signal and direct each decision unit output to different branches of the unit cell array. The unit cells may be enabled based at least in part on the decision unit outputs to generate the analog signal.

Present invention discloses an ADC and an analog-to-digital conversion method. The ADC includes: a clock generator, including M transmission gates, where the M transmission gates are configured to receive a first clock signal that is periodically sent and separately perform gating control on the first clock signal, so as to generate M second clock signals, M is an integer that is greater than or equal to 2; M ADC channels that are configured in a time interleaving manner, configured to receive one analog signal and separately perform, under the control of the M second clock signals, sampling and analog-to-digital conversion on the analog signal, so as to obtain M digital signals, where each ADC channel is corresponding to one clock signal of the M second clock signals; and an adder, configured to add the M digital signals together in a digital field, so as to obtain a digital output signal.

The systems and methods discussed herein utilized a wireless or wired transceiver having a transmitter and a receiver. The transceiver is configured to reduce distortion contributions associated with echo cancelling. The transmitter provides a replica signal and a transmit signal. The replica signal and the transmit signal can be provided using a common switch.

Instability of an internal state in a current-input-type delta-sigma modulator is reduced in a case where input changes sharply. A signal current is input to a first integration node. A difference current between a fixed current and the signal current is input to a second integration node. A voltage-to-current converter that converts a difference voltage between the voltage of the first integration node and a first reference voltage into a current and outputs it is connected between the first integration node and the second integration node. The voltage of the second integration node is compared with a second reference voltage, and a 1-bit digital signal is output. Current is draws from the first integration node or the second integration node according to the 1-bit digital signal. A short-circuit switch is provided between the first integration node and the second integration node for short-circuiting them.

To provide a semiconductor device with a novel structure. The semiconductor device includes a plurality of constant current circuits each given a digital signal. The constant current circuits each include a first transistor to a third transistor. The first transistor has a function of making a first current corresponding to set analog potential flow therethrough. The second transistor has a function of controlling the first current flowing between a source and a drain of the first transistor, in response to the digital signal. The third transistor has a function of holding the analog potential supplied to a gate of the first transistor, by being turned off. The first transistor to the third transistor each include a semiconductor layer including an oxide semiconductor in a channel formation region.