A vibration rectification error correction device includes a first filter that operates in synchronization with the measured signal, and a second filter that operates in synchronization with the reference signal, in which the first filter generates a third signal based on a first signal having a first group delay amount and a second signal having a second group delay amount, the second filter receives a signal based on the third signal and outputs a fourth signal, and a first vibration rectification error and a second vibration rectification error have different polarities.

A physical quantity sensor module includes: a resonant frequency shift based physical quantity sensor whose frequency adjusts with a adjust in physical quantity; a reference signal oscillator which outputs a reference signal; a frequency delta-sigma modulator which performs frequency delta-sigma modulation of the reference signal, using an operation signal based on a measurement target signal as an output from the resonant frequency shift based physical quantity sensor, and generates a frequency delta-sigma modulated signal; a first low-pass filter provided on an output side of the frequency delta-sigma modulator and operating synchronously with the measurement target signal as the output from the resonant frequency shift based physical quantity sensor; and a second low-pass filter provided on an output side of the first low-pass filter and operating synchronously with the reference signal.

A calibration circuit, including: a first analog-to-digital converter (ADC) configured to sample a nonlinear reference signal continuously at an equidistant sampling rate to generate a reference sampled signal; a trigger timer configured to generate trigger signals; a second ADC configured to sample a point of each of the nonlinear reference signal and repeated versions of the nonlinear reference signal in response to the respective trigger signals at equidistantly increasing delays, to generate a device-under-test (DUT) sampled voltage; and processing circuitry configured to estimate a differential nonlinearity (DNL) of the DUT sampled signal, estimate a DNL of the reference sampled signal, and compare the estimated DNL of the DUT sampled signal with the estimated DNL of the reference sampled signal, to generate a DNL performance indication signal of the second ADC.

An open-loop digital-to-analog converter (DAC) circuit may include a delta-sigma modulator, a decode block responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, an analog output driver responsive to the plurality of DAC elements, a test signal generator configured to generate a test signal that is responsive to inputs of the plurality of DAC elements, and a synchronizer configured to enable replication of the test signal at an external test system coupled to the open-loop DAC circuit in order to generate a matching test signal at the external test system that matches the test signal generated by the test signal generator.

A physical quantity sensor module includes: a resonant frequency shift based physical quantity sensor whose frequency adjusts with a adjust in physical quantity; a reference signal oscillator which outputs a reference signal; a frequency delta-sigma modulator which performs frequency delta-sigma modulation of the reference signal, using an operation signal based on a measurement target signal as an output from the resonant frequency shift based physical quantity sensor, and generates a frequency delta-sigma modulated signal; a first low-pass filter provided on an output side of the frequency delta-sigma modulator and operating synchronously with the measurement target signal as the output from the resonant frequency shift based physical quantity sensor; and a second low-pass filter provided on an output side of the first low-pass filter and operating synchronously with the reference signal.

A DAC error measurement apparatus includes: an ADC and a feedback DAC, where a measurement input of the ADC includes a square wave signal with a constant frequency, a direct-current signal at a constant logical level, and an analog output of the feedback DAC; a measurement selection module, configured to provide a measured digit in a digital output to a separately selected source cell, and provide remaining digits in the digital output to remaining source cells, where the measured digit is a flippable digit, and the remaining digits are non-flipping digits; and a measurement module, configured to measure an amplitude of the digital output based on the digital output. One flipping digit in the digital output is the measured digit, and the remaining digits are the non-flipping digits, such that the measurement selection module may separately select one source cell to receive the measured digit.

A physical quantity sensor module includes: a resonant frequency shift based physical quantity sensor whose frequency adjusts with a adjust in physical quantity; a reference signal oscillator which outputs a reference signal; a frequency delta-sigma modulator which performs frequency delta-sigma modulation of the reference signal, using an operation signal based on a measurement target signal as an output from the resonant frequency shift based physical quantity sensor, and generates a frequency delta-sigma modulated signal; a first low-pass filter provided on an output side of the frequency delta-sigma modulator and operating synchronously with the measurement target signal as the output from the resonant frequency shift based physical quantity sensor; and a second low-pass filter provided on an output side of the first low-pass filter and operating synchronously with the reference signal.

A system includes an analog-to-digital converter configured to convert an analog signal generated by a digital sensor into a digital signal, and a testing apparatus configured to be enabled after the analog-to-digital converter operates in a testing mode, wherein the testing apparatus comprises a filter configured to receive the digital signal from the analog-to-digital converter, and apply a filtering process to the digital signal, a control circuit configured to terminate the filtering process after an output of the control circuit reaches a predetermined reference value, and a result register configured to receive a result generated by the filter after the control circuit terminates the filtering process.

An open-loop digital-to-analog converter (DAC) circuit may include a delta-sigma modulator, a decode block responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, an analog output driver responsive to the plurality of DAC elements, a test signal generator configured to generate a test signal that is responsive to inputs of the plurality of DAC elements, and a synchronizer configured to enable replication of the test signal at an external test system coupled to the open-loop DAC circuit in order to generate a matching test signal at the external test system that matches the test signal generated by the test signal generator.

A method for monitoring a power electronic assembly is improved to be more effective and versatile. It includes converting and/or modifying an electrical input into at least one electrical output by a conversion and/or modifying process which proceeds in connection with the power electronic assembly. During the conversion and/or modification a bit stream is generated by a delta-sigma modulator and represents the electrical value, that is to say the electrical input or the at least one electrical output. One bit stream each can also be generated by a plurality of delta-sigma modulators and represents the respective electrical value, that is to say the electrical input and the at least one electrical output. The power electronic assembly is monitored based on the one bit stream(s) thus generated and available as a result. The bit stream(s) is/are not demodulated, and therefore very meaningful information of the corresponding useful signal is provided.