A method for use in a wireless transmitter of interleaving coded bits includes: determining an integer number (M) of polar coded bits {e(0), . . . , e(M1)} for wireless transmission; determining a smallest integer number (T) such that T(T+1)/2>=M; and determining a one-dimensional interleaving index array, interleavingId( ), that represents the column by column non-zero elements of a two-dimensional matrix. The two-dimensional matrix includes a hypothetical T by T matrix containing the polar coded bits {e(0), . . . , e(M1)} input row by row without using the lower right corner elements of the TT matrix. The method further includes: interleaving the polar coded bits {e(0), . . . , e(M1)} using the one-dimensional interleaving index array resulting in the output sequence {f(0), . . . , f(M1)} wherein f(i)=e(interleavingId(i)); and transmitting the interleaved polar coded bits to a wireless receiver.

A base station maps code blocks of a transport block of a transport block size (TBS) for a channel using tone-level interleaving or resource element (RE)-level interleaving. Then, the base station can transmit the code blocks of the transport block of the TBS for the channel. A UE may receive the channel from the base station and de-interleave the received tones of the channel in a frequency domain to obtain the code blocks of the transport block having the TBS for the channel.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.

A loss correction encoding device having an improved capability of loss correction using LDPC-CC includes a rearranging unit that rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q1)/q of a check polynomial of the loss correction code used in a loss correction encoding unit. Specifically, the rearranging unit rearranges the information data in such a way that continuous Kmax(q1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit distributes the information data to information blocks from n information packets, where n satisfies the formula Kmax(q1)n.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

Techniques discussed herein can facilitate polar coding and decoding for NR (New Radio) systems. Various embodiments discussed herein can employ polar coding and/or decoding at UE(s) (User Equipment(s)) and/or gNB(s) (next generation Node B(s)). One example embodiment employable at a UE can comprise processing circuitry configured to determine one or more thresholds for code block segmentation, wherein the one or more thresholds for code block segmentation comprise one or more of a payload threshold (Kseg) or a code rate threshold (Rseg); determine to perform code block segmentation based on the one or more thresholds and at least one of a current payload (K) of an information block or a current code rate (R) for the information block; segment the information block into a plurality of segments; and encode each segment of the plurality of segments via a polar encoder with a code size (N).

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.

Aspects present herein relate to methods and devices for wireless communication including an apparatus, e.g., a UE and/or a base station. The apparatus may encode a plurality of bits associated with QAM, the plurality of bits corresponding to a circular buffer associated with at least one RV, the plurality of bits including a plurality of systematic bits. The apparatus may also transfer the plurality of bits from the circular buffer associated with the at least one RV to a first buffer and a second buffer. Additionally, the apparatus may map the plurality of bits from the first buffer and the second buffer to a plurality of modulation symbols.