Patent classifications
H03M13/2778
Transmitter and shortening method thereof
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, maps the outer-encoded bits to some of the bits in the bit groups, and pads zero bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute Low Density Parity Check (LDPC) information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the remaining bits in which zero bits are padded include some of the bit groups which are not sequentially disposed in the LDPC information bits.
TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF
A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.
Transmitter and parity permutation method thereof
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to puncture some of the parity bits in the group-wise interleaved bit groups, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups.
POLAR CODING SYSTEMS, PROCEDURES, AND SIGNALING
Systems, methods, and instrumentalities are disclosed for interleaving coded bits. A wireless transmit/receive unit (WTRU) may generate a plurality of polar encoded bits using polar encoding. The WTRU may divide the plurality of polar encoded bits into sub-blocks of equal size in a sequential manner. The WTRU may apply sub-block wise interleaving to the sub-blocks using an interleaver pattern. The sub-blocks associated with a subset of the sub-blocks may be interleaved, and sub-blocks associated with another subset of the sub-blocks may not be interleaved. The sub-block wise interleaving may include applying interleaving across the sub-blocks without interleaving bits associated with each of the sub-blocks. The WTRU may concatenate bits from each of the interleaved sub-blocks to generate interleaved bits, and store the interleaved bits associated with the interleaved sub-blocks in a circular buffer. The WTRU may select a plurality of bits for transmission from the interleaved bits.
Data processing device and data processing method
The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 10/15 or 12/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and 64-symbol mapping, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
Parity puncturing device for variable-length signaling information encoding, and parity puncturing method using same
A parity puncturing apparatus and method for variable length signaling information are disclosed. A parity puncturing apparatus according to an embodiment of the present invention includes memory configured to provide a parity bit string for parity puncturing for the parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, and a processor configured to puncture a number of bits corresponding to a final puncturing size from the rear side of the parity bit string.
Interleaver for interleaving LDPC encoded bit sequence
Embodiments provide an interleaver for interleaving an LDPC encoded bit sequence, wherein the interleaver includes a segmentation stage configured to segment the LDPC encoded bit sequence into a plurality of chunks including a first chunk and one or more other chunks, a first interleaver stage, configured to interleave the one or more other chunks or a concatenated version thereof, a second interleaver stage, configured to block wise interleave the first chunk and an interleaved bit sequence provided by the first interleaver stage, to obtain an interleaved version of the LDPC encoded bit sequence, wherein the first chunk consists of bits of a first type being, which are error correcting bits or repeat accumulate bits of the LDPC encoded bit sequence, or are represented, in a Tanner graph representation of the LDPC encoded bit sequence, by variable nodes that include non-random connections to at least two error correcting check nodes.
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
The present invention provides an apparatus of transmitting broadcast signals. The apparatus includes, an encoder for encoding service data, a bit interleaver for bit interleaving the encoded service data, a mapper for mapping the bit interleaved service data into a plurality of OFDM (Orthogonal Frequency Division Multiplex) symbols to build at least one signal frame, an OFDM modulator for modulating data in the built at least one signal frame by an OFDM scheme and a transmitter for transmitting the broadcast signals having the modulated data.
RESOURCE MAPPING METHOD AND DEVICE
Disclosed by the present application are a resource mapping method and apparatus and device, comprising: determining to-be-sent data hosted on a data-channel physical downlink shared channel (PDSCH)/physical uplink shared channel (PUSCH); mapping said to-be-sent data to a virtual resource block (VRB); mapping the virtual resource block to a physical resource block (PRB) in resource block (RB) bundle units. Using the present application, it is possible to prevent the problem of the size of a virtual resource block bundle being inconsistent with the size of a physical resource block bundle, thus causing it to be impossible to map the virtual resource block to the physical resource block.