Provided herein may be an electronic device using an artificial neural network. The electronic device may include a training data generator configured to determine an input vector corresponding to a trapping set, detected during error correction decoding corresponding to a codeword, and a target vector corresponding to the input vector, and a training component configured to train an artificial neural network based on supervised learning by inputting the input vector to an input layer of the artificial neural network and by inputting the target vector to an output layer of the artificial neural network.

Methods, devices, non-transitory computer-readable medium, and systems are described for compressing audio data. The techniques involve obtaining a sequence of digitized samples of an audio signal, performing a transform using the sequence of digitized samples, to generate a plurality of spectral lines, obtaining a group of spectral lines from the plurality of spectral lines, and quantizing the group of spectral lines to generate a group of quantized values. Quantizing the group of spectral lines to generate the group of quantized values may comprise performing a specialized rounding operation on a spectral line selected from the group of spectral lines and using the specialized rounding operation to force a group parity value, computed for the group of quantized values, to a predetermined parity value. One or more data frames based on the group of quantized values may be outputted.

According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.

A decoding apparatus includes a multi-input branch metric calculation unit configured to calculate, by using a branch label corresponding to a path extending toward a state S at a time point N in a trellis diagram and a plurality of reception signal sequences, a branch metric in the state S, a path metric calculation unit configured to calculate a path metric in the state S at the time point N, and a surviving path list memory configured to store path labels corresponding to L path metrics among a plurality of calculated path metrics. The path metric calculation unit generates a path label in the state S at the time point N by combining the branch label with a path label in each of the states at the time point N−1 and the surviving path list memory outputs path labels corresponding to L path metrics.

In one implementation, the disclosure provides a decoding system that concurrently executes a read sample combining recovery process and an iterative outer code (IOC) recovery process. Performing the read sample combining recovery process entails executing multiple rounds of logic that each provide for combining together different data samples read from a data block. The IOC recovery process is performed at least partially concurrent with the read sample combining recovery process and each round of the IOC recovery process is based on newly-updated data samples generated by the read sample combining recovery process.

A communication unit for performing soft-decision demodulation comprises a receiver that receives a transmitted signal conveying a first set of bits comprising k bits selected from a set of 2.sup.k possible signals. A demodulator comprises a bank of 2.sup.k correlators that detects a transmission of each possible transmitted signal, and outputs 2.sup.k magnitudes of correlator outputs, based on the detected possible transmitted signals, as a first set of inputs. A-de-mapper circuit receives the first set of inputs and determines derived from a plurality of aggregated correlator output magnitude distributions of the first set of inputs, wherein the plurality of aggregated correlator output magnitude distributions is fewer than 2.sup.2k; and calculates therefrom a first set of aposteriori soft bits comprising k soft bits. In this manner, high quality soft-decisions can be obtained in a robust and practical manner.

A double factor correction Turbo decoding method based on a simulated annealing algorithm is provided, including: S1: setting an initial bit error rate P.sub.e0 and an initial solution of correction factors; S2: randomly selecting a new solution of the correction factors from a proximinal subset of a current solution, and calculating a new bit error rate P.sub.enew; S3: determining whether the new bit error rate is smaller than a bit error rate of a previous decoding, and if so, receiving the new solution of the correction factors, otherwise calculating a reception probability based on a difference between the new bit error rate and the bit error rate of the previous decoding; S4: decreasing the initial bit error rate P.sub.e0 to determine whether a termination condition is satisfied, performing S5 if the termination condition is satisfied, otherwise performing S2; and S5: outputting a current solution of the correction factors as an optimal solution.

The disclosed invention provides system and method for multi-path mesh network communications. The network system utilizes multiple communication paths and linearly encoded and disassembled packets through mathematical coding techniques that respectively travel the communication paths. The system includes an encoder, a transmitter, a decoder and a receiver. The encoder receives data from an external source and linearly encodes and simultaneously disassembles the data to generate copackets. None of the individual copackets contain decodable information of the data. The transmitter is coupled to the multiple communication paths and respectively transmits the copackets through different communication paths. The receiver receives the copackets transmitted through the communication paths. The decoder decodes available copackets and reassembles the data from the available copackets if a number of the available copackets are no less than a mathematically calculated number. The reassembled data has the complete information of the data originally transmitted.

The present disclosure provides techniques for bandwidth constrained communication systems with frequency domain information processing. A bandwidth constrained equalized transport (BCET) communication system can include a transmitter, a communication channel, and a receiver. The transmitter can include a pulse-shaping filter that intentionally introduces memory into a signal in the form of inter-symbol interference, an error control code (ECC) encoder, a multidimensional fast Fourier transform (FFT) processing block that processes the signal in the frequency domain, and a first interleaver. The receiver can include an information-retrieving equalizer, a deinterleaver with an ECC decoder, and a second interleaver joined in an iterative ECC decoding loop. The communication system can be bandwidth constrained, and the signal can comprise an information rate that is higher than that of a communication system without intentional introduction of the memory at the transmitter.

Systems, devices and methods for enhancing error correction decoding for communications using chirp spread spectrum are disclosed. A chirp signal having a plurality of chirps is received, a codeword is identified based on at least one of the plurality of chirps, a received signal strength indicator (RSSI) associated with at least a portion of the codeword is identified, at least one decoding threshold is adjusted based on the identified RSSI, and the codeword is decoded using the adjusted at least one decoding threshold.